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2019年10月04日

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關於荊老師
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目前荊老師擁有超過450篇的國際論文期刊

 

Published papers have been cited > 9300 times (from Google Scholar)
論文被引用次數超過9300
h-index=53, i10-index=218
在台灣所有電機工程系中,名列前茅

  1. Prestige International conferences:

    IEDM- 23 papers including 1 Invited paper (RF CMOS).

    Symp. On VLSI- 18 papers including 1 Highlight Section paper.

    Int’l Microwave Symp.- 17 papers & 1 in best paper award competition (24 finalist).


  2. Panelist/Tutorial/Invited Talk    

    •1st time Invited Plenary Speech from Taiwan's academic society in IEEE EDTM, March 12,2019.
    (http://ewh.ieee.org/conf/edtm/2019/program/plenary.html)

    •Invited talk, Asia-Pacific Microwave Conf. (APMC), 2013.

    •Invited talk, Progress In Electromagnetics Research Symp. (PIERS), 2013.

    •Invited talk, Asia-Pacific Radio Science Conference (AP-RASC), 2013.

    •Invited talk,  Material Research Society 2013.

    •Invited talk, 8th Intl Conf. on Si Epitaxy & Heterostructures (ICSI), 2013.

    Panelist, IEEE Intl. Conf. on Solid-State & IC Tech. (ICSICT), 2012.

    1st  Invited talk, Electro-Chemical Society, 2012.

    •IBM Exploratory Device & High-k Gate Stack Interdepartmental Seminar, 2011.

    Panelist, Si Nanoelectronics Workshop (SNW), 2011.

    •11th Non-Volatile Memory Technology Symp. (NVMTS), 2011.

    •Invited talk, SanDisk, USA 2011; Toshiba, Japan, 2011.

    •Invited talk, 3D Transistor Workshop, Japan 2010 (Yushiro Nishi, Stanford).

    Tutorial,  Material Research Society- Symposium G on Nonvolatile Memories, San Francisco, CA 2010.

    •Invited talk, Samsung Electronics, 2003, 2009 (EVP).

    IEDM Executive Committee, 2008~2010.

    •Invited talk, 16th Insulating Films on Semiconductors (INFOS), Cambridge UK, 2009.

    •Invited talk, 7th Intl Symp on High k Gate Stacks (ISHGS)-ECS, Vienna, Austria, 2009.

    •Invited talk, Intl. Solid-State Devices & Materials Conf. (SSDM), Japan, 2008.

    •Invited talk, Intl. Symp. Advanced Gate Stack Tech. (AGST), TX USA, 2008, 2011.

    •Invited talk, European Materials Research Society (E-MRS), 2006, 2012.

    •Int’l Conf. on Solid-State and Integrated-Circuit Technology (ICSICT) 2004, 2006.

    •Symposium organizer: 3rd Int’l Symp. on High k Gate Stacks (ISHGS)- ECS, 2005.

    Panelist, New channel MOSFET workshop, SEMATECH, 2005.

    •Invited talk, European Solid State Device Research Conf, (ESSDERC), 2005.

    •Invited talk, Ge technology workshop, IMEC, 2005.

                          •European Solid State Device Research Conf, (ESSDERC), France, 2005.

    •5th, 11th Non-Volatile Memory Technology Symp. (NVMTS), 2004, 2011.

                          •Panelist, 62nd Device Research Conference (DRC), 2004.

                          •Asia-Pacific Microwave Conf. (APMC), Delhi, India, 2004.

    •Invited talk, Intl SiGe Technology & Device Meeting (ISTDM), 2004, 2012.

                          •3rd International Workshop on New Group IV Semiconductors, Sendai, Japan, 2004.

                          •Invited talk, International Electron Devices Meeting (IEDM)2003.

                          •ElectroChemical Soc.(ECS) Fall Meeting, Orlando, Florida, 2003.                     

                          International Symposium on Advanced Devices and Process Technology, Tokyo, Japan, 2003.

                          •Int’l Symp. on Substrate Engineering/Nano SOI Technology for Advanced Semiconductor Devices, Seoul, Korea, 2003.

                          •International Workshop on Gate Insulator, Tokyo, Japan, 2001.

                          •International Semiconductor Technology Conference, Tokyo, Japan, 2001.

                          • Material Research Society High-K Gate Dielectrics workshop, US, June 2000.

     •59th Symp. on Semiconductors & IC Technology, Tokyo Japan, 2000.

     

                         

         

 Published Papers:

      1. SCI-Physics,applied.pdf

      2. SCI-Engineering, electrical, electronics.pdf

 

  

 PUBLICATIONS: Journal Articles (244+; 113 in IEEE papers; 49 in AM/APL/JAP/PR)

1.    Albert Chin, “Green Electronic Devices—Recent Trends,” IEEE Electron Device Society Newsletter- TECHNICAL BRIEFS, vol. 21, no. 3, pp. 1, 3~4, July 2014. (The 1st TECHNICAL BRIEFS from Asia reported in IEEE EDS Newsletter)

2.          C. H. Cheng and Albert Chin, “Low-Voltage Steep Turn-on p-MOSFET Using Ferroelectric High-κ Gate Dielectric,” IEEE Electron Device Lett., vol. 35, pp. 274-276, Feb. 2014.

3.          C. H. Cheng and Albert Chin, “Low-Leakage-Current DRAM-like Memory Using a One-Transistor Ferroelectric MOSFET with a Hf-based Gate Dielectric,” IEEE Electron Device Lett., vol. 35, pp. 138-140, Jan. 2014.

4.          D. R. Islamov, V. A. Gritsenko, C. H. Cheng, and Albert Chin, “Charge Carrier Transport Mechanism in High-κ Dielectrics and Their Based Resistive Memory Cells,” Optoelectronics, Instrumentation & Data Processing, vol. 50,  No. 3, pp. 310–314, July 2014. (English version of Russian journal ‘Autometria’)

5.          D. R. Islamov, V. A. Gritsenko, C. H. Cheng, and Albert Chin, “Evolution of the conductivity type in Germania by varying the stoichiometry,” Appl. Phys. Lett., vol. 103, p. 232904 (3 pages), Dec. 2013.

6.          K. I. Chou, C. H. Cheng, Z. W. Zheng, Ming Liu and Albert Chin, “Ni/GeOx/TiOy/TaN RRAM on Flexible Substrate with Excellent Resistance Distribution,” IEEE Electron Device Lett., vol. 34, pp. 505-507, Apr. 2013.

7.          C. C. Liao, T. C. Ku, M. H. Lin, L. Zeng, J. F. Kang, X. Y. Liu, and Albert Chin, “Metal-Gate/High-κ/Ge nMOS at Small CET with Higher Mobility than SiO2/Si at Wide Range Carrier Densities,” IEEE Electron Device Lett., vol. 34, pp. 163-165, Feb. 2013.

8.          C. H. Cheng and Albert Chin, “Evaluation of Temperature Stability of Trilayer Resistive Memories Using Work-Function Tuning,” Appl. Phys. Express, vol. 6, p. 041203, Apr. 2013.

9.          Albert Chin, “Ge technology beyond Si CMOS,” Materials Science & Engineering, vol. 41, p. 012002 (6 pages), 2012 (European Materials Research Society).

10.      C. H. Cheng, K. I. Chou, and Albert Chin, “Achieving low sub-0.6-nm EOT in gate-first n-MOSFET with TiLaO/CeO2 gate stack,” Solid-State Electronics, vol. 82, pp. 111-114, 2013.

11.      Z. W. Zheng, T. C. Ku, M. Liu, and Albert Chin, “Ohmic contact on n-type Ge using Yb-germanide,” Appl. Phys. Lett., vol. 101, p. 223501 (3 pages), 2012.

12.      S. L. Liu, M. H. Wu, and Albert Chin, “Design of a CMOS T/R Switch with High Power Capability: Using Asymmetric Transistors,” IEEE Microwave & Wireless Components Lett., vol. 22, pp.  645-647, Dec. 2012.

13.      S. L. Liu, K. H. Chen, and Albert Chin, “A Dual-Resonant Mode 10/22-GHz VCO With a Novel Inductive Switching Approach,” IEEE Trans. Microwave Theory Tech., vol. 60, pp.  2165-2177, July 2012.

14.      S. L. Liu, X. C. Tian, Yue Hao, and Albert Chin, “A Bias-Varied Low-Power K-band VCO in 90 nm CMOS Technology,” IEEE Microwave & Wireless Components Lett., vol. 22, pp. 321-323, May 2012.

15.      C. Y. Tsai, T. L. Wu, and Albert Chin, “High-Performance GaN MOSFET with High-κ LaAlO3/SiO2 Gate Dielectric,” IEEE Electron Device Lett., vol. 33, pp. 35-37, Jan. 2012. 

16.      D. R. Islamov, V. A. Gritsenko, C. H. Cheng, and Albert Chin, “Bipolar conductivity in nanocrystallized TiO2,” Appl. Phys. Lett., vol. 101, p. 032101 (2 pages), July 2012.

17.      A. V. Shaposhnikov, T. V. Perevalov, V. A. Gritsenko, C. H. Cheng, and Albert Chin, “Mechanism of GeO2 resistive switching based on the multi-phonon assisted tunneling between traps,” Appl. Phys. Lett., vol. 100, p. 243506 (3 pages), June 2012.

18.      C. Y. Tsai, and Albert Chin, “High-Performance Charge-Trapping Flash Memory Device With an Ultrathin 2.5-nm Equivalent-Si3N4-Thickness Trapping Layer,” IEEE Trans. Electron Device, vol. 59, pp. 252-254, Jan. 2012.

19.      C. H. Cheng, P. C. Chen, Y. H. Wu, F. S. Yeh, and Albert Chin, “Long Endurance Nano-Crystal TiO2 Resistive Memory Using TaON Buffer Layer,” IEEE Electron Device Lett., vol. 32, pp. 1749-1751, Dec. 2011. 

20.      D. R. Islamov, V. A. Gritsenko, A. V. Rzhanov, C. H. Cheng, and Albert Chin, “Bipolar Conductivity in Amorphous HfO2,” Appl. Phys. Lett., vol. 99, p. 072109 (3 pages), Aug. 2011. 

21.      C. H. Cheng, F. S. Yeh and Albert Chin, “Low-Power High-Performance Non-Volatile Memory on Flexible Substrate with Excellent Endurance,” Adv. Mater., vol. 23, Issue 7, pp. 902-905, Feb. 15, 2011.  (Impact Factor = 13.877)

22.      W. B. Chen, B. S. Shie and Albert Chin, “Higher Gate Capacitance Ge n-MOSFETs Using Laser Annealing,” IEEE Electron Device Lett., vol. 32, pp. 449-451, April 2011.

23.      C. Y. Tsai, T. H. Lee, and Albert Chin, “Arsenic-Implanted HfON Charge-Trapping Flash Memory with Large Memory Window and Good Retention,” IEEE Electron Device Lett., vol. 32, pp. 381-383, March 2011.

24.      C. H. Cheng, Albert Chin and F. S. Yeh, “Ultra-Low Switching Energy Ni/GeOx/HfON/TaN RRAM,” IEEE Electron Device Lett., vol. 32, pp. 366-368, March 2011.

25.      C. H. Cheng, Albert Chin and F. S. Yeh, “Novel Stacked GeO/SrTiOx Resistive Memory with Ultra-Low Resistance Currents,” Appl. Phys. Lett., vol. 98, p. 052905, Feb. 2011.

26.      C. H. Cheng, P.C. Chen, S.L. Liu, T.L. Wu, H.H. Hsu, Albert Chin, F.S. Yeh, “Bipolar switching characteristics of low-power GeO resistive memory,” Solid-State Electronics, vol. 62, pp. 90-93, Aug. 2011.

27.      C. Y. Tsai, C. H. Cheng, T. Y. Chang, K. Y. Chou, Albert Chin, and F. S. Yeh, “Size-Dependent Trapping Effect in Nano-Dot Non-Volatile Memory,” ECS Trans. 41, no. 3, pp. 121, 2011. 

28.      S. L. Liu, H. M. Chang, T. Chang, H. L. Kao, C. H. Cheng, and Albert Chin, “The Reliability Study and Device Modeling for p-HEMT Microwave Power Transistors,” ECS Trans. 41, no. 6, pp. 175-187, 2011.

29.      W. B. Chen, C. H. Cheng, and Albert Chin, “High Performance Gate-First Epitaxial Ge n-MOSFETs on Si with LaAlO3 Gate Dielectrics,” IEEE Trans. Electron Devices, vol. 57, pp. 3525-3530, Dec. 2010.

30.      C. Y. Tsai, T. H. Lee, C. H. Cheng, Albert Chin, and Hong Wang, “Highly scaled charge-trapping layer of ZrON nonvolatile memory device with good retention,” Appl. Phys. Lett., vol. 97, p. 213504, Nov. 2010.

31.      W. B. Chen, C. H. Wu, B. S. Shie, and Albert Chin, “Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing,” IEEE Electron Device Lett., vol. 31, pp. 1184-1186, Nov. 2010.

32.      C. H. Cheng, Albert Chin and F. S. Yeh, “Ultra Low Power Ni/GeO/STO/TaN Resistive Switching Memory,” IEEE Electron Device Lett., vol. 31, pp. 1020-1022, Sept. 2010.

33.      C. Y. Tsai, K. C. Chiang, S. H. Lin, K. C. Hsu, C. C. Chi, and Albert Chin, “Improved Capacitance Density and Reliability of High-κ Ni/ZrO2/TiN MIM Capacitors using Laser Annealing Technique,” IEEE Electron Device Lett., vol. 31, pp. 749-752, July 2010.

34.      N. C. Su, S. J. Wang, C. C. Huang, Y. H. Chen, H. Y. Huang, C. K. Chiang, and Albert Chin, “Low-Voltage-Driven Flexible InGaZnO Thin-Film Transistor With Small Subthreshold Swing,” IEEE Electron Device Lett., vol. 31, pp. 680-682, July 2010.

35.      S. L. Liu, K. H. Chen, T. Chang, and Albert Chin, “A Low-Power K-Band CMOS VCO with Four-Coil Transformer Feedback,” IEEE Microwave & Wireless Components Lett., vol. 20, no. 8, pp. 459-461, Aug. 2010.

36.      M. Jiang, L. M. Chang, and Albert Chin, “Design of Dual-Passband Microstrip Bandpass Filters With Multi-Spurious Suppression,” IEEE Microwave & Wireless Components Lett., vol. 20, no. 4, pp. 199-201, April 2010.

37.      N. C. Su, S. J. Wang, and Albert Chin, “A Nonvolatile InGaZnO Charge Trapping Engineered Flash Memory with Good Retention Characteristics,” IEEE Electron Device Lett., vol. 31, pp. 201-203, March 2010.

38.      W. B. Chen and Albert Chin, “High Performance of Ge n-MOSFETs Using SiO2 Interfacial Layer and TiLaO Gate Dielectric,” IEEE Electron Device Lett., vol. 31, pp. 80-82, Jan. 2010.

39.      C. H. Cheng, C. K. Deng, H. H. Hsu, P. C. Chen, B. H. Liou, Albert Chin, and F. S. Yeh, “Lanthanide-Oxides Mixed TiO2 Dielectrics for High-k MIM Capacitors,” J. Electrochem. Soc., vol. 157, no. 8, pp. H821-H824, 2010.

40.      C. H. Cheng, C. C. Huang, H. H. Hsu, P. C. Chen, K. C. Chiang, Albert Chin, and F. S. Yeh, “A study on frequency-dependent voltage nonlinearity of SrTiO3 RF capacitor,” Electrochem. Solid-State Lett. vol. 13, no. 12, H436-H438, 2010.

41.      C. H. Cheng, H. H. Hsu, I. J. Hsieh, C. K. Deng, Albert Chin, and F. S. Yeh, “High-k TiCeO MIM Capacitors with a Dual-Plasma Interface Treatment,” Electrochem. Solid-State Lett., vol. 13, no. 4, pp. H112-H115, 2010.

42.      N. C. Su, S. J. Wang, and Albert Chin, “A Low Operating Voltage ZnO Thin Film Transistor Using a High-k HfLaO Gate Dielectric,” Electrochem. Solid-State Lett., vol. 13, no. 1, pp. H8-H11, Jan. 2010.

43.      C. H. Cheng, H. H. Hsu, W. B. Chen, Albert Chin, and F. S. Yeh, “Characteristics of Cerium Oxide for Metal-Insulator-Metal Capacitors,” Electrochem. Solid-State Lett., vol. 13, no. 1, pp. H16-H19, Jan. 2010.

44.      C. H. Cheng, H. H. Hsu, P. C. Chen, B. H. Liou, A. Chin, and F. S. Yeh, “Higher-κ titanium dioxide incorporating LaAlO3 as dielectrics for MIM capacitors,” Solid-State Electronics, vol. 54, pp. 646-649, June 2010.

45.      T. Chang, H. L. Kao, Y. J. Chen, and Albert Chin, “Improved RF Power Characteristics of CMOS-Compatible Asymmetric- Lightly-Doped-Drain Metal-Oxide-Semiconductor Transistor,” Jpn. J. Appl. Phys., vol. 49, 034201 (5 pages), 2010.

46.      T. Chang, H. L. Kao, S. L. Liu, J. D. S. Deng, K. Y. Horng and Albert Chin, “Radio Frequency Power Performance Enhancement for Asymmetric- Lightly-Doped-Drain Metal-Oxide-Semiconductor Field-Effect Transistors on SiC-Substrate,” Jpn. J. Appl. Phys., vol. 49, 014104 (4 pages), 2010.

47.      S. H. Lin, K. C. Chiang, F. S. Yeh, and Albert Chin, “Improved Stress Reliability of Analog Metal-Insulator-Metal Capacitors Using TiO2/ZrO2 Dielectrics,” IEEE Electron Device Lett., vol. 30, pp. 1287-1289, Dec. 2009.

48.      N. C. Su, S. J. Wang, and Albert Chin, “High Performance InGaZnO Thin-Film Transistors using HfLaO Gate Dielectric,” IEEE Electron Device Lett., vol. 30, pp. 1317-1319, Dec. 2009.

49.      W. B. Chen and Albert Chin, “Interfacial Layer Dependence on Device Property of High-k TiLaO Ge/Si N-Type Metal-Oxide-Semiconductor Capacitors at Small Equivalent- Oxide Thickness,” Appl. Phys. Lett., vol. 95, p. 212105, Nov. 2009.

50.      S. H. Lin, C. H. Cheng, W. B. Chen, F. S. Yeh, and Albert Chin, “Low Threshold Voltage TaN/LaTiO n-MOSFETs with Small EOT,” IEEE Electron Device Lett., vol. 30, pp. 999-1001, Sept. 2009.

51.      M. F. Chang, P. T. Lee, and Albert Chin, “Low Threshold Voltage MoN/HfAlO/SiON p-MOSFETs with 0.85-nm EOT,” IEEE Electron Device Lett., vol. 30, pp. 861-863, Aug. 2009.

52.      S. H. Lin, K. C. Chiang, Albert Chin and F. S. Yeh, “High Density and Low Leakage Current MIM Capacitor Using Stacked TiO2/ZrO2 Insulators,” IEEE Electron Device Lett., vol. 30, pp. 715-717, July 2009.

53.      S. H. Lin, C. H. Cheng, W. B. Chen, F. S. Yeh, and Albert Chin, “Low Threshold Voltage TaN/Ir/LaTiO p-MOSFETs Incorporating Low-Temperature-Formed Shallow Junctions,” IEEE Electron Device Lett., vol. 30, pp. 681-683, June 2009.

54.      M. F. Chang, P. T. Lee, S. P. McAlister, and Albert Chin, “Small Sub-threshold-Swing and Low-Voltage, Flexible Organic Thin Film Transistors which use HfLaO as the Gate Dielectric,” IEEE Electron Device Lett., vol. 30, pp. 133~135, Feb. 2009.

55.      S. H. Lin, S. L. Liu, F. S. Yeh, and Albert Chin, “Low Vt TaN/HfLaO n-MOSFETs Using Low Temperature Formed Source-Drain Junctions,” IEEE Electron Device Lett., vol. 30, pp. 75-77, Jan. 2009.

56.      Albert Chin, M. F. Chang, S. H. Lin, W. B. Chen, P. T. Lee, F. S. Yeh, C. C. Liao, M.-F. Li, N. C. Su and S. J. Wang, “Flat Band Voltage Control on Low Vt Metal-Gate/High-k CMOSFETs with small EOT,” Microelectronics Engineering, vol. 86, pp. 1728–1732, July 2009.

57.      Albert Chin, S. H. Lin, K. C. Chiang, and F. S. Yeh, “Improved Device Characteristics in Charge-Trapping-Engineered Flash Memory Using High-k Dielectrics,” ECS Trans., vol. 25, no. 6, pp. 447-455, 2009.

58.      C. C. Huang, C. H. Cheng, B. H. Liou, F. S. Yeh, and Albert Chin, “Effect of Ta2O5 Doping on Electrical Characteristics of SrTiO3 Metal–Insulator–Metal Capacitors,” Jpn. J. Appl. Phys., vol. 48, pp. 081401 (6 pages), 2009.

59.      T. Chang, H. L. Kao, S. P. McAlister, K.Y. Horng and Albert Chin, “Improved RF Power Performance in a 0.18-mm MOSFET which uses an Asymmetric Drain Design,” IEEE Electron Device Lett., vol. 29, pp. 1402-1404, Dec. 2008.

60.      P. H. Tsai, K. S. Chang-Liao, D. W. Yang, Y. B. Chung, T. K. Wang, P. J. Tzeng, C. H. Lin, L. S. Lee, M. J. Tsai, and Albert Chin, “Crucial Integration of High Work-Function Metal Gate and High-k Blocking Oxide on Charge-Trapping Type Flash Memory Device,” Appl. Phys. Lett., vol. 93(25), p. 252902, Dec. 2008.

61.      M. F. Chang, P. T. Lee, S. P. McAlister, and Albert Chin, “A Flexible Organic Pentacene Non-volatile Memory Incorporating High-k Dielectric Layers,” Appl. Phys. Lett., vol. 93(23), p. 233302, Dec. 2008.

62.      C. H. Cheng, H. C. Pan, C. P. Chou, C. N. Hsiao, J. Hu, M. Hwang, T. Arikado, S. P. McAlister, and Albert Chin, “Improvement of the Performance of TiHfO MIM Capacitors by Using a Dual Plasma Treatment of the Lower Electrode,” IEEE Electron Device Lett., vol. 29, pp. 1105-1107, Oct. 2008.

63.      C. H. Cheng, S. H. Lin, K. Y. Jhou, W. J. Chen, C. P. Chou, F. S. Yeh, J. Hu, M. Hwang, T. Arikado, S. P. McAlister, and Albert Chin, “The 300oC-Processed High Density TiO2 MIM Capacitors with Low Leakage Current,” IEEE Electron Device Lett., vol. 29, pp. 845-847, Aug. 2008.

64.      C. H. Cheng, H. C. Pan, S. H. Lin, H. H. Hsu, C. N. Hsiao, C. P. Chou, F. S. Yeh, and Albert Chin, “High Performance MIM Capacitors Using a High-k TiZrO Dielectric,” J. Electrochem. Soc., vol. 155, pp. G295-298, Dec. 2008.

65.       H. J. Yang, Albert Chin, S. H. Lin, F. S. Yeh, and S. P. McAlister, “Improved High Temperature Retention for Charge-Trapping Memory by Using Double Quantum Barriers,” IEEE Electron Device Lett., vol. 29, pp. 386-388, April 2008.

66.      S. H. Lin, H. J. Yang, W. B. Chen, F. S. Yeh, S. P. McAlister, and Albert Chin, “Improving the Retention and Endurance Characteristics of Charge-Trapping Memory by Using Double Quantum Barriers,” IEEE Trans. Electron Device, vol. 55, pp. 1708-1713, July 2008.

67.      H. J. Yang, C. F. Cheng, W. B. Chen, S. H. Lin, F. S. Yeh , S. P. McAlister, and Albert Chin, “Comparison of MONOS Memory Device Integrity when Using Hf1-x-yNxOy Trapping Layers with different N Compositions,” IEEE Trans. Electron Device, vol. 55, pp. 1417-1423, June 2008.

68.      C. F. Cheng, C. H. Wu, N. C. Su, S. J. Wang, S. P. McAlister and Albert Chin, “High Work-Function Ir/HfLaO p-MOSFETs Using Low Temperature Shallow Junction,” IEEE Trans. Electron Device, vol. 55, pp. 838-843, March 2008.

69.      M. C. King, and Albert Chin, “New Test Structure to Monitor Contact-to-Poly Leakage in sub-90nm CMOS Technologies,” IEEE Trans. Semiconductor Manufacturing, vol 21, pp. 244-247, May 2008.

70.      M. F. Chang, P. T. Lee, S. P. McAlister, and Albert Chin, “Low Sub-threshold Swing HfLaO/Pentacene Organic Thin Film Transistors,” IEEE Electron Device Lett., vol. 29, pp. 215-217, March 2008.

71.      X. P. Wang, M. -F. Li, H. Y. Yu, J. J. Yang, C. X. Zhu, A. Y. Du, W.Y. Loh ,S. Biesemans, Albert Chin, G. Q. Lo, and D. L. Kwong, “Widely Tunable Work Function TaN/Ru Stacking Layer on HfLaO Gate Dielectric,” IEEE Electron Device Lett., vol. 29, pp. 50-53, Jan. 2008.

72.      C. H. Cheng, H. H. Hsu, C. K. Deng, Albert Chin, and C. P. Chou, “Improved Lower Electrode Oxidation of High-k TiCeO Metal-Insulator-Metal Capacitors by Using Dual Plasma Treatment,” ECS Trans., vol. 16, no. 5, pp. 323-333, 2008.

73.      C. C. Huang, C. H. Cheng, Albert Chin, C. P. Chou, “High Performance Ir/TiPrO/TaN Capacitors forAnalog ICs Application,” ECS Trans., vol. 16, no. 5, pp. 341-352, 2008.

74.      C. F. Cheng, C. H. Wu, N. C. Su, S. J. Wang, S. P. McAlister and Albert Chin, “HfLaON n-MOSFETs Using a Low Work Function HfSix Gate, IEEE Electron Device Lett., vol. 28, pp. 1092-1094, 2007.

75.      C. H. Cheng, H. C. Pan, C. N. Hsiao, C. P. Chou, S. P. McAlister, and Albert Chin, “Improved High-Temperature Leakage in High Density MIM Capacitors by Using a TiLaO Dielectric and an Ir Electrode,” IEEE Electron Device Lett., vol. 28, pp. 1095-1097, 2007.

76.      H. J. Yang, Albert Chin, W. J. Chen, C. F. Cheng, W. L. Huang, I. J. Hsieh, and S. P. McAlister, “A Program-Erasable High-k Hf0.3N0.2O0.5 MIS Capacitor with Good Retention,” IEEE Electron Device Lett., vol. 28, pp. 913-915, Oct. 2007.

77.      K. C. Chiang, C. H. Cheng, K. Y. Jhou, H. C. Pan and C. N. Hsiao, C. P. Chou, S. P. McAlister, Albert Chin, and H. L. Hwang, “Use of a High Work-Function Ni Electrode to Improved the Stress Reliability of Analog SrTiO3 Metal-Insulator-Metal Capacitors,” IEEE Electron Device Lett., vol. 28, pp.694-696, Aug. 2007.

78.      C. H. Wu, B. F. Hung, Albert Chin, S. J. Wang, X. P. Wang, M.-F. Li, C. Zhu, F. Y. Yen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen and M. S. Liang, “High Temperature Stable HfLaON p-MOSFETs with High Work Function Ir3Si Gate,” IEEE Electron Device Lett., vol. 28, pp.292-294, April 2007.

79.      K. C. Chiang, C. H. Cheng, H. C. Pan and C. N. Hsiao, C. P. Chou, Albert Chin, and H. L. Hwang, “High Temperature Leakage Improvement in Metal-Insulator-Metal Capacitors by Work-Function Tuning,” IEEE Electron Device Lett., vol. 28, pp. 235-237, March 2007.

80.      M. C. King, T. Chang, and Albert Chin, “RF Power Performance of Asymmetric-LDD MOS Transistor for RF-CMOS SOC Design,” IEEE Microwave & Wireless Components Lett., vol. 17, pp. 445-447, June 2007.

81.      X. P. Wang, H. Y. Yu, M. -F. Li, C. X. Zhu, S. Biesemans, Albert Chin, Y. Y. Sun, Y. P. Feng, A. Lim, Y. C. Yeo, W. Y. Loh, P. Lo and D.-L Kwong, “Wide Vfb and Vth tunability for metal gated MOS devices with HfLaO gate dielectrics,” IEEE Electron Device Lett., vol. 28, pp.258-260, April 2007.

82.      X. P. Wang, A. Lim, H. Y. Yu, M.-F. Li, C. Ren, W.-Y. Loh, C. X. Zhu, Albert Chin, A. D. Trigg, Y.-C. Yeo, S. Biesemans, D.-L. Kwong, “Work Function Tunability of Refractory Metal Nitrides by Lanthanum or Aluminum Doping for Advanced CMOS Devices,” IEEE Trans. Electron Device, no. 11, pp. 2871-2877, 2007.

83.      B. F. Hung, C. H. Wu, Albert Chin, S. J. Wang, F. Y. Yen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang, “High Temperature Stable IrxSi Gates with High Work Function on HfSiON p-MOSFETs,” IEEE Trans. Electron Device, vol. 54, no. 2, pp. 257-261, 2007.

84.      K. C. Chiang, C. C. Huang, H. C. Pan and C. N. Hsiao, J. W. Lin, I. J. Hsieh, C. H. Cheng, C. P. Chou, Albert Chin, H. L. Hwang and S. P. McAlister, “Thermal Leakage Improvement by Using a High Work-Function Ni Electrode in High-k TiHfO MIM Capacitors,” J. Electrochem. Soc., vol. 154, p. G54, 2007; specially selected for the Virtual Journal of Nanoscale Science & Technology, January 22, 2007 (American Institute of Physics & American Physical Society)

85.      K. C. Chiang, J. W. Lin, H. C. Pan, C. N. Hsiao, W. J. Chen, H. L. Kao, I . J . Hsieh, and Albert Chin, “Very High Density (44 fF/mm2) SrTiO3 MIM Capacitors for RF Application,” J. Electrochem. Soc., vol. 153, p. H214, 2007.

86.      C. C. Huang, C. H. Cheng, Albert Chin, and C. P. Chou, “Leakage Current Improvement of Ni/TiNiO/TaN Metal-Insulator-Metal Capacitors using Optimized N+ Plasma Treatment and Oxygen Annealing,” J. Electrochem. Soc. Lett., vol., p., 2007.

87.      C. H. Cheng, K. C. Chiang, H. C. Pan, C. N. Hsiao, C. P. Chou, S. P. McAlister, and Albert Chin, “Improved Stress Reliability of Analog TiHfO Metal–Insulator–Metal Capacitors Using High-Work-Function Electrode,” Jpn. J. Appl. Phys., vol. 46, pp. 7300-7302, 2007.

88.      B. F. Hung, C. C. Chen, H. L. Kao, and Albert Chin, “High-Performance Radio Frequency Passive Devices on Plastic Substrates for Radio Frequency Integrated Circuit Application,” Jpn. J. Appl. Phys., vol. 46, pp. 2758-2760, 2007.

89.      H. L. Hwang, Y. K. Chiou, C. H. Chang, C. C. Wang, K. Y. Lee, T. B. Wu, J. Kwo, M. Hong, K. S. Chang-Liao, C. Y. Lu, C. C. Lu, Y. Y. Kyi, Albert Chin, C. H. Chen, J. Y. Lee, and F. C. Chiu, “Advance in Next Century Nano CMOSFET Research and Its Future Prospects for Industry” J. Vacuum Science Tech., Nov. (2007).

90.      M. C. King, C. F. Chang, C. H. Chen, H. J. Lin, C. M. Huang, Albert Chin, “Comparison of Integrated MiM Process with Cu Dual Damascene in CMOS MS/RF Technology,” J. Electrochem. Soc., vol. 153, p. G1032, 2006.

91.      C. H. Wu, B. F. Hung, Albert Chin, S. J. Wang, F. Y. Yen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang, “HfSiON n-MOSFETs Using Low Work Function HfSix Gate,” IEEE Electron Device Lett. 27, no. 9, pp. 762-764, 2006.

92.      C. C. Huang, K. C. Chiang, H. L. Kao, Albert Chin, and W. J. Chen, “RFIC TaN/SrTiO3/TaN MIM Capacitors with 35 fF/mm2 Capacitance Density,” IEEE Microwave & Wireless Components Lett., vol. 16, no., pp. 493-495 (2006).

93.      C. H. Wu, B. F. Hung, Albert Chin, S. J. Wang, F. Y. Yen and Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang, “HfAlON n-MOSFETs Incorporating Low Work Function Gate Using Ytterbium-Silicide,” IEEE Electron Device Lett. 27, no. 6, pp. 454-456, 2006.

94.      K. C. Chiang, C. C. Huang, G. L. Chen, W. J. Chen, H. L. Kao , Y. H. Wu, Albert Chin and S. P. McAlister, “High Performance SrTiO3 Metal-Insulator-Metal Capacitors for Analog Applications,” IEEE Trans. Electron Device 53, no. 9, pp. 2312-2319, 2006.

95.      H. L. Kao, Albert Chin, C. C. Liao, C. C. Chen, S. P. McAlister and C. C. Chi, “Electrical Stress Effects and Device Modeling of 0.18mm RF MOSFETs,” IEEE Trans. Electron Device 53, no. 4, pp. 636-642, 2006.

96.      C. H. Wu, D. S. Yu, Albert Chin, S. J. Wang, M.-F. Li, C. Zhu, B. F. Hung, and S. P. McAlister, “High Work Function IrxSi Gates on HfAlON p-MOSFETs,” IEEE Electron Device Lett. 27, no. 2, pp. 90-92, 2006.

97.      X. P. Wang, M. F. Li, C. Ren, X. F. Yu, C. Shen, H. H. Ma, Albert Chin, C. X. Zhu, J. Ning, M. B. Yu, and D. L. Kwong, “Tuning Effective Metal Gate Work Function by a Novel Gate Dielectric HfLaO for nMOSFETs,” IEEE Electron Device Lett. 27, no. 1, pp. 31-33, 2006.

98.      C. H. Lai, C. H. Wu, Albert Chin, S. J. Wang, and S. P. McAlister, “A Novel Quantum Trap MONOS Memory Device using AlN,” J. Electrochem. Soc., vol. 153, pp. G738-G741, Aug. 2006.  

99.      D. S. Yu, H. L. Kao, Albert Chin, and S. P. McAlister, Performance and potential of germanium on insulator field-effect transistors,” J. Vacuum Science Tech. A, vol. 24, no. 3, pp. 690-693, 2006.

100.  X. P. Wang, M.F. Li, Albert Chin, C.X. Zhu, J. Shao, W. Lu, X.C. Shen, X.F. Yu, Ren Chi, C. Shen, A.C.H. Huan, J.S. Pan, A.Y. Du, P. Lo, D.S.H. Chan, and D. L. Kwong Physical and electrical characteristics of high-k gate dielectric Hf(1-x)LaxOy,” Solid-State Electron, vol. 50, pp. 986-991, 2006.

101.  H. L. Kao, Albert Chin, C. C. Liao, Y. Y. Tseng, S. P. McAlister, and C. C. Chi “Strain Enhanced DC-RF Performance of 0.13 um nMOSFETs on a Flexible Plastic Substrate,” Electronics Letters, vol. 42, no. 14, pp. 827-829, 2006.

102.  Albert Chin, C. Chen, D. S. Yu, H. L. Kao, S. P. McAlister and C. C. Chi, “Comparison of Germanium-on-Insulator CMOS with InGaAs MOSFETs,” Materials Science in Semiconductor Processing vol. 9,  pp. 711-715, 2006 (European Materials Research Society).

103.  M. F. Li, C. Zhu, C. Shen, X. F. Yu, Y. P. Feng, Y. C. Yeo, Albert Chin, D. L. Kwong, S. H. Wang, A. Y. Du and G. Samudra, “New Insights in Hf Based High-k Gate Dielectrics in MOSFETs,” ECS Trans., vol. 1, no. 5, pp. 717-728, 2006.

104.  C. C. Chen, J. T. Kuo, M. Jiang, and A. Chin, “Study on Parallel Coupled-Line Microstrip Filter in Broadband,” Microwave & Optical Tech. Lett., vol. 48, no.2, pp. 373-375, 2006.

105.  C. C. Chen, H. L. Kao, K. C. Chiang, and Albert Chin, “A Parallel Coupled-Line Filter Using VLSI Backend Interconnect with High Resistivity Substrate,” Int. J. IR & MMW, FEB. 2006.

106.  C. C. Chen, H. L. Kao, C. C. Liao, Albert Chin, Sean P. McAlister1 and C. C. Chi, “AC Power Loss and Signal Coupling in VLSI Backend Interconnects,” JJAP. vol. 45, no. 4B, pp. 2992-2996, 2006.

107.  H. L. Kao, B. F. Hung, Albert Chin, J. M. Lai, C. F. Lee, S. P. McAlister, and C. C. Chi, “Very Low Noise RF nMOSFETs on Plastic by Substrate-Thinning and Wafer Transfer,” IEEE Microwave & Wireless Components Lett., vol. 15, no. 11, pp. 757-759 (2005).

108.  Albert Chin and S. P. McAlister, “The Power of Functional Scaling: Beyond the Power Consumption Challenge and the Scaling Roadmap” IEEE Circuit & Devices Magazine, vol. 21, no. 1, pp. 27-35, Jan/Feb. 2005.

109.  T. Low, M. F. Li, G. Samudra, Y.-C. Yeo, C. Zhu, A. Chin, D.-L. Kwong, “Modeling Study of the Impact of Surface Roughness on Silicon and Germanium UTB MOSFETs, IEEE Trans. Electron Device, vol. 52, no. 11, pp. 2430 - 2439, 2005.

110.  K. C. Chiang, C. H. Lai, Albert Chin, T. J. Wang, H. F. Chiu, J. R. Chen, S. P. McAlister, and C. C. Chi, “Very High-Density (23 fF/mm2) RF MIM Capacitors Using high-k TaTiO as the Dielectric,” IEEE Electron Device Lett. 26, no. 10, pp. 728-730, 2005.

111.  S. J. Kim, B. J. Cho, M. B. Yu, M. F. Li, Y. Z. Xiong, C. Zhu, A. Chin and Dim-Lee Kwong, “Metal-insulator-metal RF bypass capacitor using niobium oxide (Nb2O5) with HfO2/Al2O3 barriers,” IEEE Electron Device Lett. 26, no. 9, pp. 625-627, 2005.

112.  K. C. Chiang, C. C. Huang, Albert Chin, W. J. Chen, S. P. McAlister, H. F. Chiu, J.-R. Chen, and C. C. Chi, High-k nIr/TiTaO/TaN Capacitors Suitable for Analog IC Applications,” IEEE Electron Device Lett. 26, no. 7, pp. 504-506, 2005.

113.  H. L. Kao, Albert Chin, B. F. Hung , C. F. Lee, J. M. Lai, S. P. McAlister, G. S. Samudra, Won Jong Yoo, and C. C. Chi, “Low Noise RF MOSFETs on Flexible Plastic Substrates,” IEEE Electron Device Lett. 26, no. 7, pp. 489-491, 2005.

114.  D. S. Yu , C. C. Liao, C. F. Cheng, A. Chin, M. F. Li, and S. P. McAlister, “The Effect of IrO2-IrO2/Hf/LaAlO3 Gate Dielectric on the Bias-Temperature Instability of 3D GOI CMOSFETs,IEEE Electron Device Lett. 26, no. 6, pp. 407-409, 2005.

115.  B. F. Hung, K. C. Chiang, C. C. Huang, A. Chin, and S. P. McAlister, “High-Performance Poly-Silicon Thin Film Transistors Incorporating LaAlO3 as the Gate Dielectric,” IEEE Electron Device Lett. 26, no. 6, pp. 384-386, 2005.

116.  C. H. Lai, B. F. Hung, A. Chin, W. J. Yoo, M. F. Li, C. Zhu, S. P. McAlister, and D. L. Kwong, “A novel program-erasable high-k AlN capacitor,” IEEE Electron Device Lett. 26, pp. 148 - 150, March 2005.

117.  D. S. Yu, A. Chin, C. C. Liao, C. F. Lee, C. F. Cheng, M. F. Li, W. J. Yoo, and S. P. McAlister, 3D Metal-Gate/High-k/GOI CMOSFETs on 1-Poly-6-Metal 0.18-mm Si Devices, IEEE Electron Device Lett. 26, no. 2, pp. 118-120, 2005.

118.  S. Zhu, R. Li, S. J. Lee, M. F. Li, A. Du, J. Singh, C. Zhu, A. Chin, and D. L. Kwong, “Germanium pMOSFETs With Schottky-Barrier Germanide S/D, High-k Gate Dielectric and Metal Gate,” IEEE Electron Device Lett. 26, no. 2, pp. 81-83, 2005.

119.  J. G. Mihaychuk, M. W. Denhoff, S. P. McAlister, W. R. McKinnon, and A. Chin, “Broad-spectrum light emission at microscopic breakdown sites in metal-insulator-silicon tunnel diodes,” J. Appl. Phys., vol. 98, no. 5,  pp. 054502-054502-9, 2005.

120.  Y. Q. Wang, J. H. Chen, W. J. Yoo, Y. C. Yeo, A. Chin,  and A. Y. Du, “Formation of dual-phase HfO2-HfxSi1-xO2 dielectric and its application in memory devices,” J. Appl. Phys., vol. 98, no. 1,  pp. 013536-013536-5, 2005.

121.  D. S. Yu, C. C. Liao , C. F. Lee , C. F. Cheng , A. Chin, S. P. McAlister , C.C. Chen, “Reducing AC Power Consumption by Three-Dimensional Integration of Ge-On-Insulator CMOS on 1-Poly-6-Metal 0.18 μm Si MOSFETs,” J. Electrochem. Soc., vol. 152, pp. G684-687, Aug. 2005.

122.  C. C. Liao, D. S. Yu, C. F. Cheng, K. C. Chiang, and A. Chin, “Bias-Temperature Instability on Fully-Silicided-Germanided Gates/high-k Al2O3 CMOSFETs,” J. Electrochem. Soc., vol. 152, pp. G452-455, Aug. 2005.

123.  M. F. Li, C. Zhu, C. Shen, X. F. Yu, Y. P. Feng, Y. C. Yeo, A. Chin, D. L. Kwong, A. Y. Du, and G. Samudra, “New Insights in Hf Based High-k Gate Dielectrics in MOSFETs,” ECS Trans. 1, no. 5, 717, 2006.

124.  C. C. Chen, J. T. Kuo, M. Jiang, A. Chin, and S. P. McAlister, “A Fully Planar Microstrip Coupled-Line Coupler with a High Coupling Level,” Microwave & Optical Tech. Lett., 2005.

125.  S. J. Ding, H. Hu, C. Zhu, M. F. Li, S. J. Kim, B. J. Cho, D. S. H. Chan, M. B. Yu, A. Y. Du, A. Chin, D.-L. Kwong, “Evidence and Understanding of ALD HfO2-Al2O3 Laminate MIM Capacitors Outperforming HfO2-Al2O3 Sandwich Counterparts,IEEE Electron Device Lett. 25, no. 10, pp. 681-683, 2004.

126.  N. Wu, Q. Zhang, C. Zhu, D. S. H. Chan, A. Du, N. Balasubramanian, M. F. Li, A. Chin, J. K. O. Sin, and D. L. Kwong, “A TaN-HfO2-Ge pMOSFET with novel SiH4 surface passivation,” IEEE Electron Device Lett. 25, no. 9, pp. 631-633, 2004.

127.  D. S. Yu , K. C. Chiang, C. F. Cheng, A. Chin, C. Zhu, M. F. Li, and Dim-Lee Kwong, “Fully Silicided NiSi:Hf/LaAlO3/Smart-Cut-Ge-On-Insulator n-MOSFETs With High Electron Mobility” IEEE Electron Device Lett. 25, no. 8, pp. 559-561, 2004.

128.  S. J. Kim, B. J. Cho, M.-F. Li, S.-J. Ding, C. Zhu, M. B. Yu, B. Narayanan, A. Chin, and D.-L. Kwong, “Improvement of voltage linearity in high-k MIM Capacitors using HfO2-SiO2 stacked dielectric,” IEEE Electron Device Lett. 25, no. 8, pp. 538-540, 2004.

129.  S. Zhu, J. Chen, M.-F. Li, S. J. Lee, J. Singh, C. X. Zhu, A. Du, C.H. Tung, A. Chin, and D. L. Kwong, “N-type Schottky Barrier Source/Drain MOSFET using Ytterbium Silicide,” IEEE Electron Device Lett. 25, no. 8, pp. 565-567, 2004.

130.  X. F. Yu, C. X. Zhu, M. F. Li, A. Chin, M. B. Yu, A. Y. Du, and D. L. Kwong, “Mobility enhancement in TaN metal-gate MOSFETs using Tantalum incorporated HfO2 gate dielectric, IEEE Electron Device Lett. 25, no. 7, pp. 501-503, 2004.

131.  S.-J. Ding, H. Hu, C. Zhu, S. J. Kim, X. Yu, M.-F. Li, B. J. Cho, D.S.H Chan, M. B. Yu, S. C. Rustagi, A. Chin, and D.-L. Kwong, “RF, DC, and Reliability Characteristics of ALD HfO2-Al2O3 Laminate MIM Capacitors for Si RF IC Applications,” IEEE Trans. Electron Devices, 51, no. 6, pp. 886-894 (2004).

132.  S. Zhu, H. Y. Yu, S. J. Whang, J. H. Chen, C. Shen, C. Zhu, S. J. Lee, M. F. Li, DSH Chan, W. J. Yoo, A. Du, C. H. Tung, J. Singh, A. Chin, and D. L. Kwong, “Schottky-Barrier S/D MOSFETs with High-K Gate Dielectrics and Metal Gate Electrode,” IEEE Electron Device Lett. 25, no. 5, pp. 268-270 (2004).

133.  D. S. Yu, C. H. Huang, A. Chin, C. Zhu, M. F. Li, B. J. Cho, and D. L. Kwong, “Al2O3/Ge-On-Insulator n- and p-MOSFETs with Fully NiSi and NiGe Dual Gates,” IEEE Electron Device Lett. 25, no. 3, pp. 138-140 (2004).

134.  C. Y. Lin, A. Chin, Y. T. Hou, and M. F. Li, S. P. McAlister, and D. L. Kwong, “Light emission near 1.3 mm using ITO/Al2O3/Si0.3Ge0.7/Si tunnel diodes,” IEEE Photonics Tech. Lett. 16, no. 1, pp. 36-38 (2004).

135.  C. L. Sun, S. Y. Chen, C. C. Liao, and A. Chin, “Low Voltage Lead Titanate/Si One-Transistor Ferroelectric Memory with Good Device Characteristics,” Appl. Phys. Lett., vol. 85, no. 20, pp. 4726-4728, Nov. 2004.

136.  N. Wu, Q. Zhang, C. Zhu, DSH Chan, M.F. Li, N. Balasubramanian, A. Chin, and D. L. Kwong, “Alternative surface passivation process for TaN/HfO2/Ge metal-oxide- semiconductor capacitors,” Appl. Phys. Lett., vol. 85, no. 18, pp. 4127-4130, Nov. 2004.

137.  X. F. Yu, C. Zhu, M. F. Li, A. Chin, A. Y. Du, W. D. Wang, and D. L. Kwong, “Electrical characteristics and suppressed boron penetration behavior of thermally stable HfTaO gate dielectrics with polycrystalline-silicon gate,” Appl. Phys. Lett., vol. 85, no. 14, pp. 2893-2895, Oct. 2004.

138.  T. Low, M. F. Li, C. Shen, Y. C. Yeo, Y. T. Hou, C. Zhu, A. Chin, and D. L. Kwong “Electron mobility in Ge and strained-Si channel ultrathin-body metal-oxide semi conductor field-effect transistors,” Appl. Phys. Lett., vol. 85, no. 12, pp. 2402-2404, Sept. 2004.

139.  N. Wu, Q. Zhang, C. Zhu, C. C. Yeo, S. J. Whang, D. S. H. Chan, M. F. Li, B. J. Cho, A. Chin, D. L. Kwong, A. Y. Du, C. H. Tung,and N. Balasubramanian, “Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate,” Appl. Phys. Lett., vol 84, no. 19, pp. 3741-3743, 2004.

140.  C. C. Liao, C. F. Cheng, D. S. Yu and Albert Chin, “The copper contamination effect on Al2O3 gate dielectric on Si,” J. Electrochem. Soc. 151, pp. G693-G696, Oct. 2004.

141.  M. Y. Yang, D. S. Yu, and Albert Chin, High-Density Radio-Frequency Metal-Insulator- Metal capacitors using High-k nLa2O3 dielectrics,” J. Electrochem. Soc. 151, pp. F162-165 (2004).

142.  C. H. Huang, D. S. Yu, A. Chin, W. J. Chen, and S. P. McAlister, “Device level characterization for energy bandgap of strain-relaxed SiGe and oxide/SiGe barrier height,” J. Electrochem. Soc. 151, pp. G377-G379 (2004).

143.  B. T. Chen, C. H. Tseng, H. C. Cheng, C. W. Chao, T. K. Chang, J. H. Lu and A. Chin, “Symmetric Gate-Overlapped LDD Poly-Si TFTs with Selective and Isotropic Deposited Ni Sub-gate,” Electrochem.& Solid-State Lett. 7, pp. G37-G39 (2004).

144.  S. Zhu, H. Y. Yu, J. D. Chen, S. J. Whang, J. H. Chen, C. Shen, C. Zhu, S. J. Lee, M. F. Li, D. S. H. Chan, W. J. Yoo, A. Du, C. H. Tung, J. Singh, A. Chin, and D. L. Kwong, “Low temperature MOSFET technology with Schottky barrier source/drain, high-k gate dielectric and metal gate electrode,” Solid-State Electronics, 48, 2004, pp. 1987-1992.

145.  C. C. Chen, B. F. Hung, A. Chin, and S. P. McAlister, “High Performance CPW and Microstrip Ring Resonators on Silicon Substrates,” Microwave & Optical Tech. Lett., September 20, 2004.

146.  C. C. Chen, B. F. Hung, A. Chin, and S. P. McAlister, “High Performance Bulk And Thin-Film Microstrip Transmission Lines On VLSI-Standard Si Substrates,” Microwave & Optical Tech. Lett., September 20, 2004.

147.  D. S. Yu, C. H. Wu, C. H. Huang, A. Chin, W. J. Chen,  Chunxiang Zhu, M. F. Li, and Dim-Lee Kwong, “Fully Silicided NiSi and Germanided NiGe Dual Gates on SiO2 n- and p-MOSFETs,” IEEE Electron Device Lett. 24, no. 12, pp. 739-741 (2003).

148.  S. J. Ding, H. Hu, H. F. Lim, S. J. Kim, X. F. Yu, C. Zhu, M. F. Li, B. J. Cho,D. S. H. Chan, S. C. Rustagi, M. B. Yu, A. Chin, and D. L. Kwong, High-Performance MIM Capacitor Using ALD High-k HfO2-Al2O3 Laminate Dielectrics,” IEEE Electron Device Lett. 24, no. 12, pp. 730-732 (2003).

149.  K. T. Chan, C. H. Huang, A. Chin, M. F. Li, D. L. Kwong, S. P. McAlister, D. S. Duh, and W. J. Lin, “Large Q-factor Improvement for Spiral Inductors on Silicon using Proton Implantation,” IEEE Microwave & Wireless Components Lett. 13, no. 11, pp.  460-462 (2003).

150.  M.Y. Yang, C.H. Huang, A. Chin, C. Zhu, B.J. Cho, M.F. Li, and Dim-Lee Kwong, “Very high density RF MIM capacitors (17fF/μm2) using high-κ Al2O3 doped Ta2O5 dielectrics,” IEEE Microwave & Wireless Components Lett. 13, no. 10, pp. 431-433 (2003).

151.  K. T. Chan, A. Chin, M. F. Li, D. L. Kwong, S. P. McAlister, D. S. Duh, W. J. Lin, and C. Y. Chang, “High-Performance Microwave Coplanar Bandpass and Bandstop Filters on Si Substrates,” IEEE Trans. Microwave Theory  Tech., vol. 51, no. 9, pp. 2036-2040 (2003).

152.  K. T. Chan, A. Chin, Y. D. Lin, C. Y. Chang, C. X. Zhu, M. F. Li, D. L. Kwong, S. McAlister, D. S. Duh, and W. J. Lin, “Integrated antennas on Si with over 100 GHz performance, fabricated using an optimized proton implantation process,” IEEE Microwave & Wireless Components Lett. 13, no. 11, pp. 487 -489 (2003).

153.  S. J. Kim, B. J. Cho, M. F. Li, C. Zhu, A. Chin, and D. L. Kwong, “Lanthanide (Tb)-Doped HfO2 for High-Density MIM Capacitors,” IEEE Electron Device Lett. 24, pp. 442-444, July (2003).

154.  S. J. Kim, B. J. Cho, M. F. Li, X. Yu, C. Zhu, A. Chin, and D. L. Kwong, “PVD HfO2 for high-precision mim capacitor applications,” IEEE Electron Device Lett. 24, pp. 387-389, June (2003).

155.  M.Y. Yang, C. H. Huang, A. Chin, C. Zhu, M. F. Li, and D. L. Kwong,High Density MIM Capacitors Using AlTaOx Dielectrics,” IEEE Electron Device Lett. 24, pp. 306-308, May (2003).

156.  C. Y. Lin, D. S. Yu, A. Chin, C. Zhu, M. F. Li, and D. L. Kwong, “Fully silicided NiSi gate on La2O3 MOSFETs,” IEEE Electron Device Lett. 24, pp. 348-350, May (2003).

157.  H. Hu, C. Zhu, X. Yu, A. Chin, M. F. Li, B. J. Cho, and D. L. Kwong, “MIM Capacitors Using Atomic-Layer-Deposited High-κ (HfO2)1-x(Al2O3)x dielectrics,” IEEE Electron Device Lett. 24, no. 2, pp. 60-62 (2003).

158.  X. Yu, C. Zhu, H. Hu, A. Chin, M. F. Li, B. J. Cho, and D. L. Kwong, “A High Density MIM Capacitor (13 fF/μm2) Using ALD HfO2 Dielectrics,” IEEE Electron Device Lett. 24, no. 2, pp. 63-65 (2003).

159.  K. T. Chan, A. Chin, S. P. McAlister, C. Y. Chang, J. Liu, S. C. Chien, D. S. Duh, and W. J. Lin, “Low RF noise and power loss for ion implanted Si having an improved implantation process,” IEEE Electron Device Lett. 24, pp. 28-30, Jan. (2003).

160.  C. L. Sun, J. J. Hsu, S. Y. Chen, and A. Chin, “Effect of Zr/Ti Ratios on Characterization of Pb(ZrxTi1-x)O3 Thin Films on Al2O3 Buffered Si for One-Transistor Memory Applications,” J. Electrochem. Soc. 150, pp. G187-G191 (2003).

161.  K. T. Chan, C. Y. Chen, A. Chin, J. C. Hsieh, J. Liu, T. S. Duh, and W. J. Lin, “40-GHz Coplanar Waveguide Bandpass Filters on Silicon Substrate,” IEEE Microwave  & Wireless Components Lett. 12, no. 11, pp. 429-431 (2002).

162.  C. H. Huang, C. H. Lai, J. C. Hsieh and J. Liu and A. Chin, “RF noise in 0.18-mm and 0.13-mm MOSFETs,” IEEE Microwave & Wireless Components Lett. 12, no. 12, pp. 464-466 (2002).

163.  C. H. Huang, S. B. Chen, and A. Chin, “La2O3/Si0.3Ge0.7 p-MOSFETs with high hole mobility and good device characteristics,” IEEE Electron Device Lett. 23, pp. 710-712 (2002).

164.  C. Y. Lin, W. J. Chen, C. H. Lai, A. Chin, and J. Liu, “Formation of Ni Germano-Silicide on Single Crystalline Si0.3Ge0.7/Si,” IEEE Electron Device Lett. 23, 464 (2002).

165.  C. H. Tseng, T. K. Chang, F. T. Chu, J. M. Shieh, B. T. Dai, H. C. Cheng, and A. Chin, “Investigation of Inductively Coupled Plasma Gate Oxide on Low Temperature Polycrystalline-Silicon Thin Film Transistors,” IEEE Electron Device Lett. 23, 333 (2002).

166.  S. B. Chen, J. H. Lai, K. T. Chan, A. Chin, J. C. Hsieh, and J. Liu, “Frequency-dependent capacitance reduction in high-k AlTiOx and Al2O3 gate dielectrics from IF to RF frequency range,” IEEE Electron Device Lett. 23, no. 4, pp. 203-205, 2002.

167.  S. B. Chen, J. H. Lai, A. Chin, J. C. Hsieh, and J. Liu, “High density MIM capacitors using Al2O3 and AlTiOx dielectrics,” IEEE Electron Device Lett. no. 4, pp. 185-188, 2002.

168.  C. L. Sun, S. Y. Chen, S. B. Chen and A. Chin, “Bi3.25La0.75Ti3O12 Thin Films on Ultra-thin Al2O3 Buffered Si for Ferroelectric Memory Application,” Appl. Phys. Lett. 80, 3168 (2002).

169.  C. L. Sun and S. Y. Chen, S. B. Chen, A. Chin, “Effect of annealing temperature on physical and electrical properties of Bi3.25La0.75Ti3O12 thin films on Al2O3-buffered Si,” Appl. Phys. Lett. 80, 1984 (2002).

170.  S. B. Chen, C. H. Huang, A. Chin, J. Lin, J. P. Jou, K. C. Su, and J. Liu, “RF noise characteristics of high-k AlTiOx and Al2O3 gate dielectrics,” J. Electrochem. Soc. 149, F69 (2002).

171.  C. Y. Lin, K. H. Shih, C. C. Wu, and A. Chin, “Poly-Si Thin-Film Transistors Crystallized by Electron-beam Annealing,” J. Electrochem. Soc. 149, G391 (2002).

172.  C. H. Huang, A. Chin, and W. J. Chen, “Characterization of Si/SiGe Heterostructures on Si Formed by Solid Phase Reaction,” J. Electrochem. Soc. 149, G209  (2002).

173.  C. H. Tseng, C. W. Lin, T. H. Teng, T. K. Chang, H. C. Cheng, and A. Chin, “Study on dopant activation of phosphorous implanted polycrystalline silicon thin films by KrF excimer laser annealing,” Solid-State Electronics, vol. 46, no. 8, pp. 1085-1090 (2002).

174.  A. Chin, M. Y. Yang, C. L. Sun, and S. Y. Chen, “Stack gate PZT/Al2O3 one transistor ferroelectric memory,” IEEE Electron Device Lett. 22, 336 (2001).

175.  Y. H. Lin, F. M. Pan, Y. C. Liao, Y. C. Chen, I. J. Hsieh, and A. Chin, “The Cu contamination effect in oxynitride gate dielectrics,” J. Electrochem. Soc. 148, G627 (2001).

176.  C. L. Sun, S. Y. Chen, M. Y. Yang, and A. Chin, “Characteristics of Pb(Zr0.53Ti0.47)O3 on Metal and Al2O3/Si Substrates,” J. Electrochem. Soc. 148, F203 (2001).

177.  C. H. Tseng, C. W. Lin, T. K. Chang, H. C. Cheng, and A. Chin, “Effects of Excimer Laser Dopant Activation on the Low Temperature Polysilicon Thin-Film Transistors with Lightly Doped Drains,” Electrochem. Solid-State Lett. 4, G94 (2001).

178.  Y. H. Lin, Y. C. Chen, K. T. Chan, F. M. Pan, I. J. Hsieh, and A. Chin, “The strong degradation on 30 Å oxide integrity contaminated by copper,” J. Electrochem. Soc. 148, F73 (2001).

179.  Y. H. Wu, A. Chin, K. H. Shih, C. C. Wu, C. P. Liao, S. C. Pai, C. C. Chi, “Fabrication of very high resistivity Si with low loss and cross talk,” IEEE Electron Device Lett. 21, no. 9, 442 (2000).

180.  Y. H. Lin, Y. H. Wu, A. Chin, and F. M. Pan “The effect of copper on gate oxide integrity,” J. Electrochem. Soc. 147, 4305 (2000).

181.  Y. H. Wu, A. Chin, and W. J. Chen, “Thickness dependent gate oxide quality of thin thermal oxide grown on high temperature formed SiGe,” IEEE Electron Device Lett. 21, 289 (2000).

182.  Y. H. Wu and A. Chin, “High temperature formed SiGe p-MOSFETs with good device characteristics,” IEEE Electron Device Lett. 21, 350 (2000).

183.  Y. H. Wu, M. Y. Yang, A. Chin, and W. J. Chen, “Electrical characteristics of high quality La2O3 dielectric with equivalent oxide thickness of 5Å,” IEEE Electron Device Lett., vol. 21, pp. 341-343, July 2000.

184.  Y. H. Wu and A. Chin, “Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7,” IEEE Electron Device Lett. 21, 113 (2000).

185.  Y. H. Wu, C. H. Huang, W. J. Chen, C. N. Lin, and A. Chin, “The buried oxide property in oxygen plasma enhanced low-temperature wafer bonding,” J. Electrochem. Soc. 147, 2754 (2000).

186.  Y. H. Wu, S. B. Chen, A. Chin, and W. J. Chen “High Quality Thermal Oxide Grown on High Temperature Formed SiGe,” J. Electrochem. Soc. 147, 1962 (2000).

187.  Y. H. Wu, W. J. Chen, S. L. Chang, A. Chin, S. Gwo, and C. Tsai, “Improved Electrical Characteristics of CoSi2 Using HF-Vapor Pretreatment,” IEEE Electron Device Lett. 20, 200 (1999).

188.  J. M. Lai, W. H. Chieng, B. C. Lin, A. Chin, and C. Tsai, “The leakage current effect of thin gate oxide (2.4-2.7 nm) with in-situ native oxide desorption,” J. Electrochem. Soc. 146, 2216 (1999).

189.  Y. H. Wu, W. J. Chen, A. Chin, and C. Tsai, “The effect of native oxide on epitaxial SiGe from deposited amorphous Ge on Si,” Appl. Phys. Lett. 74, 528 (1999).

190.   B. C. Lin, Y. C. Cheng, A. Chin, T. Wang, and C. Tsai, “The Deuterium Effect on Stress-Induced Leakage Current,” Jpn. J. Appl. Phys. 38, 2337 (1999) (special issue of SSDM Conference).

191.  C. C. Liao, A. Chin, and C. Tsai, “Electrical Characterization of Al2O3 on Si from MBE-grown AlAs and Al,” J. Crystal Growth, 201/202, pp. 652-655, (1999) (special issue of Intl. MBE Conference).

192.  A. Chin, B. C. Lin, W. J. Chen, Y. B. Lin, and C. Tsai, “The Effect of Native oxide on Thin Gate Oxide Integrity,” IEEE Electron Device Lett. 19, 426 (1998).

193.  A. Chin, W. J. Chen, T. Chang, R. H. Kao, B. C. Lin, C. Tsai, and J. C.-M. Huang, “Thin Oxides with in-situ Native Oxide Removal,” IEEE Electron Device Lett. 18, 417 (1997).

194.  A. Chin, W. J. Chen, B. C. Lin, J. H. Kao, C. Tsai, and J. C.-M. Hwang, "Ultra-thin (11 Å - 38 Å) N2O-oxide with atomically flat interfaces," J. Electrochem. Soc. 144, L97 (1997).

195.  A. Chin, C. C. Liao, and C. Tsai, "In0.52Al0.48As/InAs/InxAl1-xAs Pseudomorphic HEMT’s on InP," IEEE Electron Device Lett. vol. 18, no. 4, pp. 157-159 (1997).

196.  A. Chin, C. C. Liao, J. Chu, and S. S. Li, “Investigation of Si-doped p-type AlGaAs/GaAs, AlGaAs/InGaAs quantum well infrared photodetectors and multi-quantum wells grown on (311)A GaAs,” J. Crystal Growth 176, 999 (1997).

197.  A. Chin, B. C. Lin, and W. J. Chen, "High quality epitaxial Si grown by a simple low-pressure chemical vapor deposition at 550 degrees C," Appl. Phys. Lett. 69, 1617 (1996).

198.  A. Chin, K. Lee, B. C. Lin, and S. Horng, "Picosecond photoresponse of carriers in Si ion-implanted Si," Appl. Phys. Lett. 69, no. 5, 653 (1996).

199.  A. Chin, W. J. Chen, F. Ganikhanov, G.-R. Lin, J.-M. Shieh, C.-L. Pan, and K. C. Hsieh, "Microstructure and subps photoresponse in GaAs grown by molecular beam epitaxy at very low temperatures," Appl. Phys. Lett. 69, 397 (1996).

200.    A. Chin and W. J. Chen, "Observation of compositional modulation in (111)A InGaAs quantum wells and the effect on optical properties," Appl. Phys. Lett. 69, 443 (1996).

201.  A. Chin and K. Lee, "High quality Al(Ga)As/GaAs/Al(Ga)As quantum wells grown on (111)A GaAs substrates," Appl. Phys. Lett. 68, 3437 (1996).

202.  A. Chin, B. C. Lin, G. L. Gu, and K. Y. Hsieh, "Optical and structure properties of spontaneously formed long-range compositional modulation in (111)A and (111)B AlGaAs," J. Appl. Phys. 79, 8669 (1996).

203.  A. Chin and B. C. Lin, “High optical quality of strained (111)B In0.12Ga0.88As/GaAs and In0.12Ga0.88As/Al0.2Ga0.8As multiple quantum wells,” Appl. Phys. Lett. 68, 2717 (1996).

204.  J. F. Chen, N. C. Chen, S. Y. Chiu, P. Wang, W. I. Lee, and A. Chin, “Temperature-dependent transport properties of n+ GaAs/low temperature GaAs/n+ GaAs structures grown by molecular beam epitaxy,” J. Appl. Phys. 79, 8488 (1996).

205.  A. Chin, H. Y. Lin, and B. C. Lin, "Enhancement of the optical and electrical properties in InGaAlP/InGaP PIN heterostructures by rapid thermal annealing on misoriented substrate," Solid-State Electronics 39, 1005 (1996).

206.  A. Chin, B. C. Lin, G. L. Gu, and K. Y. Hsieh, "Spontaneously formed long-range Al-rich and Ga-rich AlxGa1-xAs/AlyGa1-yAs superlattice and optical properties enhancement in (111)A AlGaAs," Appl. Phys. Lett. 67, 3617 (1995).

207.  A. Chin, H. Y. Lin and K. Y. Hsieh, "Strong enhancement of the optical and electrical properties, and spontaneous formation of an ordered superlattice in (111)B AlGaAs," J. Crystal Growth 150, 436 (1995).

208.  A. Chin, K. Y. Hsieh, and H. Y. Lin, "Spontaneous formation of Al rich and Ga rich AlxGa1-xAs/AlyGa1-yAs superlattice and strong enhancement of optical properties," Appl. Phys. Lett. 65, 1921 (1994).

209.  T. M. Cheng, A. Chin, C. Y. Chang, M. F. Huang, K. Y. Hsieh, and J. H. Huang, "Strong accumulation of As precipitates in low temperature InGaAs quantum wells grown by molecular beam epitaxy," Appl. Phys. Lett. 64, 1546 (1994).

210.  T. M. Cheng, C. Y. Chang, A. Chin, M. F. Huang, and J. H. Huang, "Two-dimensional arsenic precipitation by In delta doping during low temperature molecular beam epitaxy growth of GaAs or AlGaAs," Appl. Phys. Lett. 64, 2517 (1994).

211.  A. Chin, T. M. Cheng, S. P. Peng, Z. Osman, U. Das, and C. Y. Chang, "Strong luminescence intensities in Al0.22Ga0.78As grown on misoriented (111)B GaAs," Appl. Phys. Lett. 63, 2381 (1993).

212.  A. Chin, L. Yang, P. Martin, K. Nordheden, J. Ballingall, T. Yu, and P. C. Chao, "High performance heterojunction bipolar transistors grown by molecular-beam epitaxy using novel growth method," J. Vac. Sci. Technol. B11, 972 (1993).

213.  A. Chin, P. Martin, U. Das, J. Mazurowski, and J. Ballingall, "Chemical beam epitaxial growth of InP, InGaP, and InAs heterojunctions using triethylindium and bisphosphinoethane," J. Vac. Sci. Technol. B11, 847 (1993).

214.  H. H. Wang, J. F. Whitaker, A. Chin, J. Mazurowski, and J. M. Ballingall, "Subpicosecond carrier response of unannealed low-temperature grown GaAs vs temperature," J. Electron Materials 22, 1461 (1993).

215.  J. H. Zhao, T. Burke, M. Weiner, A. Chin, and J. M. Ballingall, "Reverse-biased performance of a molecular-beam-epitaxial-grown AlGaAs/GaAs high-power optothyristor for pulsed power-switching applications," J. Appl. Phys. 74, 5225 (1993).

216.  J. H. Zhao, T. Burke, D. Larson, M. Weiner, A. Chin, J. M. Ballingall, and T. Yu, "Sensitive optical gating of reverse-biased AlGaAs/GaAs optothyristors for pulsed power switching applications," IEEE Trans. Electron Devices 40, 817 (1993).

217.  A. Chin, P. Martin, U. Das, J. Mazurowski, and J. Ballingall, "Use of triethylindium and bisphosphinoethane for the growth of InP by chemical beam epitaxy," Appl. Phys. Lett. 61, 2099 (1992).

218.  A. Chin, P. Martin, U. Das, J. Ballingall, and T. Yu, "High-quality materials and heterostructures on (111)B GaAs," J. Vac. Sci. Technol. B10, 775 (1992).

219.  J. H. Zhao, T. Burke, D. Larson, M. Weiner, A. Chin, J. M. Ballingall, and T. Yu, "Dynamic I-V characteristics of an AlGaAs/GaAs-based optothyristor for pulsed power-switching applications," IEEE Electron Device Lett. EDL-13, 161 (1992).

220.  J. H. Zhao, T. Burke, D. Larson, M. Weiner, A. Chin, J. M. Ballingall, and T.-H. Yu, "Using reverse dynamic I-V characteristics of AlGaAs/GaAs optothyristor for pulsed power-switching applications," Electron. Lett. 28, 977 (1992).

221.  S. D. Hersee, L. Yang, M. Kao, P. Martin, J. Mazurowski, A. Chin, and J. Ballingall, "MOMBE GaAs and AlGaAs for microelectronic devices," J. Crystal Growth 120, 218 (1992).

222.  C. Kurdak, A. M. Chang, A. Chin, and T. Y. Chang, "Quantum interference effects and spin-orbit interaction in quasi-one-dimensional wires and rings," Phys. Rev. B 46, 6846 (1992).

223.  W. Zhou, D. D. Smith, H. Shen, J. Pamulapati, M. Dutta, A. Chin, and J. Ballingall, "Comparison of (111)- and (001)-grown GaAs-AlxGa1-xAs quantum wells by magnetoreflectance," Phys. Rev. B 45, 12156 (1992).

224.  A. Chin, P. Martin, J. Ballingall, T.-H. Yu, and J. Mazurowski, "Comparison of high quality (111)B and (100) AlGaAs grown by molecular beam epitaxy," Appl. Phys. Lett. 59, 2394 (1991).

225.  A. Chin, P. Martin, P. Ho, J. Ballingall, T. Yu, and J. Mazurowski, "High quality (111)B GaAs, AlGaAs, AlGaAs/GaAs modulation doped heterostructures and a GaAs/InGaAs/GaAs quantum well," Appl. Phys. Lett. 59, 1899 (1991).

226.  A. Chin, and T. Y. Chang, "Enhancement of quantum efficiency in thin photodiodes through absorptive resonance," IEEE J. Lightwave Technol. vol 9, no. 3, pp. 321 - 328 (1991).

227.  A. Chin, T. Y. Chang, A. Ourmazd, and E. M. Monberg, "Partial ordering and enhanced mobility in Ga0.47In0.53As grown on vicinal (110) InP," Appl. Phys. Lett. 58, 968 (1991).

228.  A. Chin, T. Y. Chang, A. Ourmazd, E. M. Monberg, A. M. Chang, and C. Kurdak, "Effects of substrate orientation, pseudomorphic growth and superlattice on alloy scattering in modulation doped GaInAs," J. Crystal Growth 111, 466 (1991).

229.  S. D. Hersee, P. M. Martin, A. Chin, and J. M. Ballingall, "The growth of high-quality AlGaAs by metalorganic molecular-beam epitaxy," J. Appl. Phys. 70, 973 (1991).

230.  A. Chin, and T. Y. Chang, "Achievement of Exceptionally High Mobilities in Modulation Doped Ga1-xInxAs on InP Using a strain Composited Structure," J. Vac. Sci. Technol. B8, 364 (1990).

231.  A. Chin, and T. Y. Chang, "Multilayer Reflectors by MBE for Resonance Enhanced Absorption in Thin High Speed Detectors," J. Vac. Sci. Technol. B8, 339 (1990).

232.  D. Biswas, A. Chin, J. Pamulapati, and P. K. Bhattacharya, "Traps in Molecular-Beam Epitaxial In1-x-yGaxAlyAs/InP," J. Appl. Phys. 67, 2450 (1990).

233.  A. Chin, P. K. Bhattacharya, K. H. Chang, and D. Biswas, "Optical and Structural Properties of Molecular Beam Epitaxial GaAs on Sapphire," J. Vac. Sci. Technol. B7, 283 (1989).

234.  A. Chin, and P. K. Bhattacharya, "Theory and Operation of a GaAs/AlGaAs/InGaAs Superlattice Phototransistor with Controlled Avalanche Gain," IEEE Trans. Electron Devices 36, 2183 (1989).

235.  A. Chin, P. K. Bhattacharya, W. P. Hong, and W. Li," Molecular Beam Epitaxial Growth of High Quality In0.52Al0.48As and In1-x-yGaxAlyAs,"  J. Vac. Sci. Technol. B6, 665 (1988).

236.  W. Li, A. Chin, and P. K. Bhattacharya, " Molecular Beam Epitaxial GaAs Optical Detectors on Silica Fibers," Appl. Phys. Lett. 52, 1768 (1988).

237.  M. Marso, A. Chin, P. K. Bhattacharya and H. Beneking, "GaInAs Camel Diodes Grown by MBE," J. De Physique 49, C4-717 (1988).

238.  R. Borroff, R. Merlin, A. Chin, and P. K. Bhattacharya, "Raman Scattering by Optical Phonons in In1-x-yGaxAlyAs Lattice-Matched to InP," Appl. Phys. Lett. 53, 1652 (1988).

239.  A. Chin, P. K. Bhattacharya, and G. P. Kothiyal, "Growth of GaAs on SiOx by Molecular Beam Epitaxy," J. Appl. Phys. 62, 1419 (1987).

240.  P. K. Bhattacharya, A. Chin, and K. Seo, "A Controlled-Avalanche Superlattice Transistor," IEEE Electron Device Lett. EDL-8, 19 (1987).

241.  W. P. Hong, A. Chin, N. Debbar, J Hinckley, P. K. Bhattacharya and J. Singh, "Material properties and clustering in Molecular Beam Epitaxial In0.52Al0.48As and In1-x-yGaxAlyAs,"  J. Vac. Sci. Technol. B5, 800 (1987).

242.  W. P. Hong, S. Dhar, P. K. Bhattacharya, and A. Chin, "Deep Levels and a Possible D-X-Like Center in Molecular Beam Epitaxial InxAl1-xAs," J. Electron. Materials 16, 271 (1987).

243.  U. Das, Y. Zebda, P. K. Bhattacharya, and A. Chin, "Performance Characteristics of InGaAs/GaAs and GaAs/InGaAlAs Coherently Strained Superlattice Photodiodes," Appl. Phys. Lett. 51, 1164 (1987).

244.  Y. Nashimoto, S. Dhar, W. P. Hong, A. Chin, P. R. Berger, and P. K. Bhattacharya, "Investigation of Molecular Beam Epitaxial In0.53Ga0.47As Regrown on Liquid Phase Epitaxial In0.53Ga0.47As/InP," J. Vac. Sci. Technol. B4, 540 (1986).

 

  

BOOK CHAPTER:

1.           Albert Chin and S. P. McAlister, “Nanoscaled High-k Dielectrics for CMOS and Memory Devices,” Handbook of NANOCERAMICS and Their Based NANODEVICES, American Scientific Publishers (ASP), 2009.

2.          Polymer Thin Films Albert Chin, “High Performance Organic Thin-Film Transistors and Nonvolatile Memory Devices Using High-k Dielectric Layers,” Polymer Thin Films, pp. 197-216, INTECH Publisher, April 2010, ISBN 978-953-307-059-9.

http://sciyo.com/books/show/title/polymer-thin-films#

3.           Albert Chin, “Metal Gate/High-κ CMOS Evolution from Si to Ge Platform,” High-κ Gate Dielectrics for CMOS Technology, Wiley-VCH publishers, pp. 381~405, Aug. 2012, ISBN 978-3-527-33032-4.

 

  

CONFERENCES & PROCEEDINGS: (227+; 128 in IEEE)

Invited paper talk/Panelist: International Electron Devices Meeting (IEDM) 2003, Device Research Conference (DRC) 2004, European Materials Research Society (E-MRS) 2006, European Solid State Device Research Conf, (ESSDERC) 2005, Intl. Solid-State Devices & Materials Conf. (SSDM) 2008 etc.

 

1.          C. H. Cheng and Albert Chin, “A New Ferroelectric RRAM with Fast Switching Speed and Extremely Long Endurance Compatible to DRAM,” 13th Intl Conf. on Modern Materials & Technologies, Tuscany, Italy, June 8-19, 2014. (Intl Advisory Board Member)

2.          Albert Chin, “High Performance RF Front-End Devices/Circuits on VLSI-Standard Si Substrate,” 35th Progress In Electromagnetics Research Symp. (PIERS), Guangzhou, China, Aug. 25-28, 2014. (Invited paper)

3.          Albert Chin and S. H. Yi, “High Performance n+/p Junction Technology for High Mobility Ge nMOSFET,” 14th Intl Workshop on Junction Technology (IWJT) (IEEE), Shanghai, China, May 18-20, 2014. (Invited paper)

4.          Albert Chin, “Opportunity and Challenges for Organic Electronics beyond Silicon Integrated Circuit,” Intl Union of Materials Research Societies – Intl Conf. on Electronic Materials (IUMRS-ICEM), Taipei World Trade Center, Taiwan, June 10-14, 2014. (Invited paper)

5.          Y.-B. Wang , J. Q. Liu, J. L.-W. Li, and Albert Chin, “High-Gain DR Circular Patch On-Chip Antenna Based on Standard CMOS Technology for Millimeter-Wave Applications,” IEEE International Workshop on Electromagnetics,” Sapporo, Hokkaido, Japan August 4-6, 2014.

6.          L. Y. Xie, J. Q. Liu, Y. B. Wang, C. Chuang, Albert Chin, Joshua L. W. Li, “Investigation of a Miniature and High Gain On-chip V Band Microstrip Antenna,” 35th Progress In Electromagnetics Research Symp. (PIERS), Guangzhou, China, Aug. 25-28, 2014.

7.          Albert Chin, and R. M. Wallace, “High-κ/AlGaN/GaN MOSFET on Si Substrate toward Manufacturing,” 11th Taiwan-U.S. Air Force Nanoscience Workshop, Hualien, Taiwan, May 13-15, 2014.  

8.          Albert Chin, C. H. Cheng, Z. W. Zheng and Ming Liu, “A Low Switching Energy RRAM with Excellent Endurance and Improved Distribution,” Materials Research Society (MRS), San Francisco, USA, April 1-5, 2013. (Invited paper & session chair)

9.          Albert Chin and H. L. Kao, “High performance RF passive devices on IC-Standard Si wafer near ideal EM design,” Asia-Pacific Microwave Conf. (APMC), IEEE, Seoul, Korea, Nov. 5~8, 2013. (Invited paper)

10.      Albert Chin and H. L. Kao, “Si-based Devices Technologies toward THz,” Progress In Electromagnetics Research Symp. (PIERS), Stockholm, Sweden, Aug. 12-15, 2013. (Invited paper)

11.      Albert Chin, “High Channel Mobility Ge nMOSFET with Good Source-Drain Ohmic Contact and Small EOT,” 8th Intl Conf. on Si Epitaxy & Heterostructures (ICSI-8), Fukuoka, Japan, June 2-7, 2013. (Invited paper)

12.      Albert Chin, J.-Q. Liu, and Joshua Li, “RF Noise and Power Performance Improvements in Si MOSFET,” Asia-Pacific Radio Science Conference (AP-RASC), Taipei, Taiwan Sept. 3-7, 2013. (Invited paper)

13.      Albert Chin, “High-κ Flash Memory,” Energy Materials Nanotechnology, Beijing, China, Sept. 7-10, 2013. (Invited paper)

14.      P.-G. Chen, M. H. Lee, C. Y. Tsai, and Albert Chin, “Quaternary InAlGaN-Barrier GaN MOS-HEMT with Enhancement-Mode Operation,” 8th Intl Conf. on Si Epitaxy & Heterostructures (ICSI-8), Fukuoka, Japan, June 2-7, 2013.

15.      D. A. Islamov, T. V. Perevalov, V. A. Grisenko, C. H. Cheng, and A. Chin, “Resistive Memory Switching and Charge Transport Mechanism in HfO2,” 7th Intl Workshop Functional Nanomaterials & Devices, pp. 81-82, Kyiv, Ukraine, April 8-11, 2013.

16.       Z. W. Zheng, C. H. Cheng, K. I. Chou, M. Liu, and Albert Chin, “Current Uniformity Improvement in Flexible Resistive Memory,” IEEE Intl Conf. of Electron Devices and Solid-State Circuits (EDSSC), Hong Kong, June 3-5, 2013.

17.       K. I. Chou, C. H. Cheng, and Albert Chin, “GeO2/PZT Resistive Random Access Memory Devices With Ni electrode,” IEEE Intl Conf. of Electron Devices and Solid-State Circuits (EDSSC), Hong Kong, June 3-5, 2013. 

18.      Albert Chin, “High voltage High-κ/AlGaN/GaN MOSFET,” 10th Taiwan-U.S. Air Force Nanoscience Workshop, Tokyo, Japan, Aug. 20-22, 2013.

19.      S. L. Liu, X. C. Tian, Yue Hao, Y. C. Huang, and Albert Chin, “A Low-power K-band VCO Using Switchable Active Circuit Design,” Progress In Electromagnetics Research Symp. (PIERS), Taipei, Taiwan, March 25-28, 2013. (Session Organizer & chair)

20.      Peter Ye (Perdue), T. P. Ma (Yale), Raj Jammy (SEMATECH VP), David Harame (IBM CTO), Thomas Schroede (IHP Head), Albert Chin, and Kevin Chen (HKS&T), “High mobility channel for 10nm node and beyond,” IEEE Intl. Conf. on Solid-State & IC Tech. (ICSICT), Oct. 30, 2012. (Panelist)

21.      Albert Chin, W. B. Chen, P. C. Chen, Y. H. Wu, C. C. Chi, Y. J. Lee, K. S. Chang-Liao and C. H. Kuan, “Advanced Metal-Gate/High-κ CMOS with Small EOT and Better High Field Mobility,” IEEE Intl. Conf. on Solid-State & IC Tech. (ICSICT), Oct. 29-Nov. 1, 2012. (Invited paper)

22.      Albert Chin, Y. C. Chiu, C. H. Cheng, Z. W. Zheng and M. Liu, “Ultra-Low Switching Power RRAM Using Hopping Conduction Mechanism,” Dielectric Materials & Metals for Nanoelectronics & Photonics 10, in 222th ECS Meeting, pp. 1-6, Honolulu, Hawaii, Oct. 7-12, 2012. (1st Invited paper & session chair)

23.      Albert Chin, “Ge technology beyond Si CMOS, in Symp. on More than Moore: Novel materials approaches for functionalized Silicon based Microelectronics (European Materials Research Society, E-MRS) Symp. Dig., pp., Strasbourg, France, May 14~17, 2012. (Invited paper & session chair)

24.      Albert Chin, P. C. Chen, C. H. Cheng, Y. H. Wu, X.Y. Liu, and J. F. Kang, “High-κ Gate Dielectrics for Ge CMOS and Related Memory Devices,” in International SiGe Technology and Device Meeting (ISTDM) Symp. Dig. (IEEE), pp., Berkeley, CA, USA, June 4~6, 2012. (Invited paper & session chair)

25.      S. L. Liu, Y. C. Huang, Y. J. Chen, T. Chang and Albert Chin, “A 2.4 GHz CMOS Power Amplifier Using Asymmetric MOSFETs,” Asia-Pacific Microwave Conf. (APMC), IEEE, Dec. 4-7, 2012.

26.      J. Chen, T. C. Ku, M. F. Li, Albert Chin, “Investigation of Schottky Junction and MOS Technology for III-V Compound Semiconductor MOSFET Application,” 12th Intl Workshop on Junction Technology (IWJT) (IEEE), Shanghai, China, May 14-15, 2012.

27.      Albert Chin, “The Abnormal C-V Characteristics on High-κ/AlGaN/GaN FET Structure,” 9th Taiwan-U.S. Air Force Nanoscience Workshop, Kenting, Taiwan, April 16-20, 2012.

28.      B. Gao, J.F. Kang, Y.S. Chen, F.F. Zhang, B. Chen, P. Huang, L.F. Liu, X.Y. Liu, Y.Y. Wang, X.A. Tran, Z.R. Wang, H.Y. Yu, Albert Chin, “Oxide-Based RRAM: Unified Microscopic Principle for Unipolar and Bipolar Switching,” in IEEE Intl Electron Devices Meeting (IEDM) Tech. Dig., pp. 420-423, Dec. 2011.

29.      Albert Chin, C. Y. Tsai, and Hong Wang, “High Performance Charge-Trapping Flash Memory with Highly-Scaled Trapping Layer,” 11th Non-Volatile Memory Technology Symp. (NVMTS) (IEEE), Shanghai, China, Nov. 7-9, 2011. (Invited paper)

30.      Albert Chin, “High Performance RRAM with Ultra-Low Switching Power,” 8th Intl. Symp. on Advanced Gate Stack Technology (ISAGST) (IEEE), Bolton Landing, NY, USA, Oct. 19-21, 2011. (Invited paper)

31.      Albert Chin, “Non-Volatile Memories for Storage Device and New Applications,” IEEE Silicon Nanoelectronics Workshop (SNW), Kyoto, Japan, June 12-13, 2011. (Panelist)

32.      S. L. Liu, H. M. Chang, T. Chang, H. L. Kao, C. H. Cheng, and Albert Chin, “The Reliability Study and Device Modeling for pHEMT Microwave Power Transistors,” 220th ECS Meeting, Boston, MA, USA, Oct. 9-14, 2011.

33.      C. Y. Tsai, C. H. Cheng, T. Y. Chang, K. C. Chou, Albert Chin, and F. S. Yeh, “Size- Dependent Trapping Effect in Nano-Dot NonVolatile Memory,” 220th ECS Meeting, Boston, MA, USA, Oct. 9-14, 2011.

34.      C. W. Chen, C. H. Cheng, H. C. Yu, G. Y. Huang, N. H. Chen, Albert Chin, F. S. Huang, “Immersion-plated Gold Nanocrystal Embedded in LaxO1-x for Nonvolatile Memory,” Materials Research Society (MRS), San Francisco, USA, April 25-29, 2011.

35.      Albert Chin and T. Kanayama, “High Performance Green Electronic Devices on Glass/Plastics,” Taiwan-Japan Workshop on Nano Devices, Tokyo Institute of Technology, Japan, March 4, 2011.

36.      Albert Chin, “Hetero-Interface Improvement of High-κ/Semiconductor MOSFET using Laser Annealing,” 8th Taiwan-U.S. Air Force Nanoscience Workshop, Seattle, Washington, USA, April 5-6, 2011.

37.      W. B. Chen, B. S. Shie, C. H. Cheng, K. C. Hsu, C. C. Chi, and Albert Chin, “Higher κ Metal-Gate/High-κ/Ge n-MOSFETs with <1 nm EOT Using Laser Annealing,” in IEEE Intl Electron Devices Meeting (IEDM) Tech. Dig., pp. 420-423, San Francisco, Dec. 2010.

38.      C. Y. Tsai, T. H. Lee, Hong Wang, and Albert Chin, “Highly-Scaled 3.6-nm ENT Trapping Layer MONOS Device with Good Retention and Endurance,” in IEEE Intl Electron Devices Meeting (IEDM) Tech. Dig., pp. 110-113, San Francisco, Dec. 2010.

39.      C. H. Cheng, Albert Chin, and F. S. Yeh, “High Performance Ultra-Low Energy RRAM with Good Retention and Endurance,” in IEEE Intl Electron Devices Meeting (IEDM) Tech. Dig., pp. 448-451, San Francisco, Dec. 2010.

40.      C. H. Cheng, Albert Chin, and F. S. Yeh, “Very High Performance Non-Volatile Memory on Flexible Plastic Substrate,” in IEEE Intl Electron Devices Meeting (IEDM) Tech. Dig., pp. 512-515, San Francisco, Dec. 2010.

41.      C. H. Cheng, Albert Chin, and F. S. Yeh, “Novel Ultra-Low Power RRAM with Good Endurance and Retention,” IEEE Symp. on VLSI Technology, pp. 85-86, US, June 2010.

42.      Albert Chin, “Charge-trapping memories: materials and devices,” Materials Research Society (MRS), San Francisco, USA, April, 4-8, 2010. (Tutorial & Section Chair)

43.      Albert Chin, “Challenges and potential solution for low cost 3D non-volatile memory,” 3D Transistor and its Applications Workshop, Tokyo, Japan, Nov. 5th, 2010. (Invited paper)

44.      Albert Chin, “Novel Ultra-Low Energy High-Speed Non-Volatile Memory with Good Retention and Endurance,” CMOS Emerging Technologies, Whistler, BC, Canada, May 19th-21st, 2010. (Invitation only)

45.      Albert Chin, W. B. Chen, B. S. Shie, K. C. Hsu, P. C. Chen, C. H. Cheng, C. C. Chi, Y. H. Wu, K. S. Chaing-Liao, S. J. Wang , C. H. Kuan, and F. S. Yeh, “Metal-Gate/High-κ CMOS Scaling from Si to Ge at Small EOT,” 10th Intl. Conf. on Solid-State & Integrated-Circuit Technology (ICSICT), (IEEE), Nov, 2010. (Invited paper)

46.      Albert Chin, M. F. Chang, P. T. Lee and C. H. Wu, “High Performance Organic TFT and Nonvolatile Memory Using High-k Dielectric Layers,” Progress In Electromagnetics Research Symposium (PIERS), Xi'an, CHINA, March 22-26, 2010.

47.      Albert Chin, Invention of Nearly Ideal Non-Volatile Memory Using High-κ and Nano Technologies, 7th Taiwan-U.S. Air Force Nanoscience Workshop, Yilan,Taiwan, April 1, 2010.

48.      Albert Chin, S. L. Liu, T. Chang, and C. C. Liao, “High Performance Si-Based RF Devices,” 12th Intl. Symp. Microwave and Optical Tech. (ISMOT), New Delhi, India, Dec. 16-19, 2009. (Invited paper & Session Chair)

49.      Albert Chin, S. H. Lin, K. C. Chiang, and F. S. Yeh, “Improved Device Characteristics in Charge-Trapping-Engineered Flash Memory Using High-k Dielectrics,” 7th International Symposium on High Dielectric Constant Materials and Gate Stacks, 216th Electro Chemical Society (ECS) Meeting, Vienna, Austria, Oct. 4-9, 2009. (Invited paper & Session Chair)

50.      Albert Chin, S. H. Lin, F. S. Yeh, C. C. Liao, and M.-F. Li, “Improved Retention and Cycling Characteristics of MONOS Memory Using Charge-Trapping-Engineering,” 16th IEEE Intl. Symp. on the Physical & Failure Analysis of ICs (IPFA), pp. 641-645, China, July 6-10, 2009. (Invited paper)

51.      Albert Chin, M. F. Chang, S. H. Lin, W. B. Chen, P. T. Lee, F. S. Yeh, C. C. Liao, M.-F. L, N. C. Su and S. J. Wang “Flat Band Voltage Control on Low Vt Metal-Gate/High-k CMOSFETs with small EOT,” 16th Bi-Annual Conference on Insulating Films on Semiconductors (INFOS),  pp. 1728–1732, Cambridge University, UK, June 29~July 1, 2009. (Invited paper)

52.      T. Chang, H. L. Kao, Y. J. Chen, S. L. Liu, S. P. McAlister, and Albert Chin, “A CMOS-Compatible, High RF Power, Asymmetric-LDD MOSFET with Excellent Linearity,” in  IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 457-460, San Francisco, Dec. 2008.

53.      S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC Retention and Fast Erase Characteristics in Charge-Trap-Engineered Memory having a Scaled Si3N4 Layer,” in IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 843-846, San Francisco, Dec. 2008.

54.      C. C. Liao, Albert Chin, N. C. Su, M.-F. Li, and S. J. Wang, “Low Vt Gate-First Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS Using Simple Process,” IEEE Symp. on VLSI Technology, pp. 190-191, US, June 2008.

55.      Albert Chin, C. H. Cheng, N. C. Su, S. J. Wang, C. C. Liao, C. P. Chou, and H. L. Hwang, “Low Vt metal-gate/high-k CMOS From Understanding the Mechanism to Innovative Solution,” Intl. Conference on Solid-State Devices & Materials (SSDM), (IEEE), pp. , Japan, Sept., 2008. (Invited paper)

56.      Albert Chin, M. F. Chang, C. C. Liao, N. C. Su, P. T. Lee, and S. J. Wang, “Low Vt
Metal-Gate/High-
k
CMOS Using Laser-Irradiation Annealing and Reflection,” International Symp. on Advanced Gate Stack Technology (ISAGST), (IEEE), Austin, Texas USA, Sept.29-Oct. 1, 2008. (Invited paper)

57.      Albert Chin, H. J. Yang, S. H. Lin, and F. S. Yeh, “Improved High Temperature Retention and Endurance in HfON Trapping Memory with Double Quantum Barriers,” 8th Intl. Conf. on Solid-State & Integrated-Circuit Technology (ICSICT), (IEEE), October, 2008. (Invited paper)

58.      M. F. Chang, P. T. Lee and Albert Chin, “Low Voltage and Small Subthreshold Swing HfLaO/Pentacene Organic TFTs,” Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), pp. , Japan, Sept., 2008.

59.      S. H. Lin, H. J. Yang, H. L. Kao, F. S. Yeh, and Albert Chin, “Improved 150oC Retention in Hf0.3O0.5N0.2 Memory Device with Low Voltage and Fast Writing,” 66th Device Research Conference (DRC) (IEEE), pp., Santa Barbara, CA, June 2008.

60.      N. C. Su, C. H. Wu, M. F. Chang, J. Z. Huang, S. J. Wang, W. C. Lee, P. T. Lee, H. L. Kao and Albert Chin, “Gate-First Low Vt Al/TaN/Ir/HfLaO p-MOSFET Using Simple Laser Annealing,” 66th Device Research Conference (DRC) (IEEE), pp., Santa Barbara, CA, June 2008.

61.      C. H. Cheng, H. H. Hsu, Albert Chin, and C. P. Chou, “Improved Lower Electrode Oxidation of High-k TiCeO Metal-Insulator-Metal Capacitors by Using Dual Plasma Treatment,” 214th  ECS Meeting, Honolulu, HI, Oct. 12-17, 2008.

62.      C. C. Huang, C. H. Cheng, Albert Chin, C. P. Chou, “High Performance Ir/TiPrO/TaN Capacitors forAnalog ICs Application,” 214th  ECS Meeting, Honolulu, HI, Oct. 12-17, 2008.

63.      Albert Chin, “High-k Dielectric Metal-Electrode Innovation to Logic &  Memory Devices,” CMOS High-k/metal Gate stacks workshop, IEEE EDS Shanghai Chapter, Fudan Microe, Shanghai, China, 24th Oct 2008. (Invited paper)

64.      C. F. Cheng, C. H. Wu, N. C. Su, S. J. Wang, S. P. McAlister and Albert Chin, “Very Low Vt [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions,” in IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 333-336, Washington DC, Dec. 2007. (one of the 14 finalist for best paper competition) (Section Chairman)

65.      H. L. Kao, D. Y. Yang, Albert Chin, and S. P. McAlister, “2.4/5 GHz Dual-Band LC VCO using Variable Inductor and Switched Resonator,” IEEE MTT-S Intl. Microwave Symp. Dig., pp. 177-180, June 12-17, 2007.

66.      X.P. Wang, M.-F. Li, H.Y. Yu, J.J. Yang, C.X. Zhu, W.S. Hwang, W.Y. Loh, A.Y. Du, J.D. Chen, Albert Chin, S. Biesemans, G.Q. Lo, and D.-L. Kwong, “Highly Manufacturable CMOSFETs with Single High-k (HfLaO) and Dual Metal Gate Integration Process,” Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), pp. 2007.

67.      H. L. Kao, Albert Chin, K. C. Chang, and S. P. McAlister, “A Low-Power Current-Reuse LNA for Ultra-Wideband Wireless Receivers from 3.1 to 10.6 GHz,” Si Monolithic IC in RF Systems, pp. 257-260, Long Beach, CA, Jan. 2007.

68.      H. L. Kao, Albert Chin, C. C. Liao, and S. P. McAlister, “Very Low Noise in 90nm Node RF MOSFETs using a New Layout,” Si Monolithic IC in RF Systems, pp. 44-48, Long Beach, CA, Jan. 2007.

69.      H. L. Kao, C. C. Liao, S. P. McAlister, and Albert Chin, “DC-RF Performance Improvement of Strained 0.13mm MOSFETs on a Flexible Plastic Substrate,” Intl. Semiconductor Device Research Symp. (IEEE), Dec. 2007.

70.      Y. L. Wu , S. T. Lin, C. C. Yang, C. H. Wu, and Albert Chin, “Study of Low-Temperature and Post-Stress Hysteresis in High-k Gate Dielectrics,” Intl. Semiconductor Device Research Symp. (IEEE), Dec. 2007.

71.      C. H. Wu, B. F. Hung, Albert Chin, S. J. Wang, X. P. Wang, M.-F. Li, C. Zhu, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang “High Temperature Stable [Ir3Si-TaN]/HfLaON CMOS with Large Work-Function Difference,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 617-620, San Francisco, CA, Dec. 2006. (Section Chairman)

72.      Albert Chin, C. Chen, D. S. Yu, H. L. Kao, S. P. McAlister and C. C. Chi, “Comparison of Germanium-on-Insulator CMOS with InGaAs MOSFETs,” in European Materials Research Society (E-MRS) Symp. Dig., pp. 711-715, May 2006. (Invited paper & Section Chairman)

73.      C. H. Lai, Albert Chin, H. L. Kao, K. M. Chen, M. Hong, J. Kwo and C. C. Chi, “Very Low Voltage SiO2/HfON/HfAlO/TaN Memory with Fast Speed and Good Retention,” IEEE Symp. on VLSI Technology, pp. 54-55, US, June 2006.

74.      K. C. Chiang, C. C. Huang, Albert Chin, W. J. Chen, H. L. Kao, M. Hong, and J. Kwo, “High Performance Micro-Crystallized TaN/SrTiO3/TaN Capacitors for Analog and RF Applications,” IEEE Symp. on VLSI Technology, pp. 102-103, US, June 2006.

75.      X. P. Wang, C. Shen, Ming-Fu Li, H. Y. Yu, Y. Sun, Y. P. Feng, A. Lim, H. W. Sik, Albert Chin, Y. C. Yeo, Patrick Lo, and D. L. Kwong, “Dual Metal Gates with Band-Edge Work Functions on Novel HfLaO High-k Gate Dielectric,” IEEE Symp. on VLSI Technology, pp. 9-10, US, June 2006.

76.      H. L. Kao, Albert Chin, C. C. Liao, C. C. Huang, K. C. Chiang, S. P. McAlister and C. C. Chi, “High RF Performance and Low Cost Mechanically Strained MOSFETs on Plastic Substrates,” IEEE MTT-S Intl. Microwave Symp. Dig., pp. 295-298, June 12-17, 2006.

77.      H. L. Kao, Albert Chin, C. C. Liao, S. P. McAlister, J. Kwo, and M. Hong, “Measuring and Modeling the Scaling Trend of the RF Noise in MOSFETs,” 64th  Device Research Conference (DRC) (IEEE), pp., 2006.

78.      C. C. Liao, S. Kao, Albert Chin, D. S. Yu, M.-F. Li, C. Zhu, and S. P. McAlister, “Comparing High Mobility InGaAs FETs with Si and GOI Devices,” 64th Device Research Conference (DRC) (IEEE), pp. 85-86, 2006.

79.       C. C. Chen, Albert Chin, M. T. Yang, and Sally LiuHigh Performance Band-Pass Filter Embedded into SoCs Using VLSI Backend Interconnects and High Resistivity Silicon Substrate,” IEEE Intl. Interconnect Tech. Conf. (IITC) Dig., pp. 295-298, San Francisco, USA, June 5-7, 2006.

80.      A. Chin, C. H. Lai, K. C. Chiang, W. J. Chen, Y. H. Wu, and H. L. Hwang,  “Very low voltage and high speed MONOS non-volatile memory” 7th Intl. Conf. on Solid-State and Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2006. (Invited paper)

81.      Ming-Fu Li, X. P. Wang, H. Y. Yu, C. X. Zhu, Albert Chin, A.Y. Du, J. Shao, W. Lu, X. C. Shen, P. Liu, S. Hung, P. Lo, and D.L. Kwong, “A Novel High-k Gate Dielectric HfLaO for Next Generation CMOS Technology,” 7th Intl. Conf. on Solid-State and Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2006. (Invited paper)

82.      X. P. Wang, M-F. Li, H. Y. Yu, C. Ren, W. Y. Loh, C. X. Zhu, Albert Chin, A. D. Trigg, Y. C. Yeo, S. Biesemans, P. Lo, and D. L. Kwong, “Work Function Tunability by Incorporating Lanthanum and Aluminum into Refractory Metal Nitride and a Feasible Integration Process of Such,” 7th Intl. Conf. on Solid-State and Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2006.

83.      B. F. Hung, C. C. Chen, H. L. Kao, and Albert Chin, “High Performance RF Passive Devices on Plastic Substrates for RFIC Application,” Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), pp. , Yokohama, Japan, Sept. 15-17, 2006.

84.      D. S. Yu, Albert Chin, C. H. Wu, M.-F. Li, C. Zhu, S. J. Wang, W. J. Yoo, B. F. Hung and S. P. McAlister, “Lanthanide and Ir-based Dual Metal-Gate/HfAlON CMOS with Large Work-Function Difference,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 649-652, Washington DC, Dec. 2005.

85.      Albert Chin, C. C. Laio, K. C. Chiang, D. S. Yu, W. J. Yoo, G. S. Samudra, S. P. McAlister, and C. C. Chi, “Low Voltage High Speed SiO2/AlGaN/AlLaO3/TaN Memory with Good Retention,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 165-168, Washington DC, Dec. 2005.

86.      X. Yu, C. Zhu, M. Yu, M. F. Li, Albert Chin, C. H. Tung, D. Gui, and D. L. Kwong, “Excellent Electrical Performance CMOS Devices with HfTaON/SiO2 Gate Dielectric and TaN Metal Gate for Advanced Low Standby Power Application,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 31-34, Washington DC, Dec. 2005.

87.      Y. Q. Wang, P. K. Singh, W. J. Yoo, Y. C. Yeo, G. Samudra, Albert Chin, J. H. Chen, S. J. Wang, and D-L. Kwong, “Long retention and low voltage operation using IrO2/HfAlO/HfSiO/HfAlO gate stack for memory application,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 169-172, Washington DC, Dec. 2005.

88.      Albert Chin, “Device and Modeling of Ge-on-Insulator CMOSFETs,” New Channel Materials for Future MOSFET Technology Workshop, (SEMATECH meeting), Washington DC, Dec. 4, 2005. (Invited paper Panelist)

89.      C. H. Lai, Albert Chin, K. C. Chiang, W. J. Yoo, C. F. Cheng, S. P. McAlister, C. C. Chi and P. Wu, “Novel SiO2/AlN/HfAlO/IrO2 Memory with Fast Erase, Large DVth and Good Retention,” IEEE Symp. on VLSI Technology, pp. 210-211, Japan, June 2005.

90.      H. L. Kao, Albert Chin, B. F. Hung, J. M. Lai, C. F. Lee, M.-F. Li, G. S. Samudra, C. Zhu, Z. L. Xia, X.Y. Liu, and J. F. Kang “Strain-Induced Very Low Noise RF MOSFETs on Flexible Plastic Substrate,” IEEE Symp. on VLSI Technology, pp. 160-161, Japan, June 2005.

91.      K. C. Chiang, Albert Chin, C. H. Lai, W. J. Chen, C. F. Cheng, B. F. Hung, and C. C. Liao, “Very High k and High Density TiTaO MIM Capacitors for Analog and RF applications,” IEEE Symp. on VLSI Technology, pp. 62-63, Japan, June 2005.

92.      S. J. Kim, B. J. Cho, M. B. Yu, M. -F. Li, Y. -Z. Xiong, C. Zhu, Albert Chin, and D. -L. Kwong, “High Capacitance Density (> 17 fF/µm2) Nb2O5-based MIM Capacitors for Future RF IC Applications,” IEEE Symp. on VLSI Technology, pp. 56-57, Japan, June 2005. (Best Paper Award in Symp. on VLSI Tech.)

93.      M. F. Li, C. Zhu, C. Shen, X. F. Yu, X. P. Wang, T. Yang, Y. P. Feng, A. Y. Du, Y. C. Yeo, G. Samudra, Albert Chin and D. L. Kwong, “New Insights in Based High-k Gate Dielectrics in MOSFETs,” ECS 208th meeting, Los Angeles, CA, Oct. 16-21, 2005. (Invited paper)

94.      H. L. Kao, Albert Chin, C. C. Huang, B. F. Hung, K. C. Chiang, Z. M. Lai, S. P. McAlister and C. C. Chi, “Low Noise and High Gain RF MOSFETs on Plastic Substrates,” IEEE MTT-S Intl. Microwave Symp. Dig., pp. 295-298, June 12-17, 2005.

95.      K. C. Chiang, C. H. Lai, Albert Chin, H. L. Kao and S. P. McAlister, and C. C. Chi, “Very High Density RF MIM Capacitor Compatible with VLSI,IEEE MTT-S Intl. Microwave Symp. Dig., pp. 287-290, June 12-17, 2005.

96.      H. L. Kao, Albert Chin, J. M. Lai, C. F. Lee, K. C. Chiang, and S. P. McAlister, “Modeling RF MOSFETs After Electrical Stress Using Low-Noise Microstrip Line Layout,” in IEEE RF-IC Symp. Dig., pp. 157-160, June 2005.

97.      Albert Chin, H. L. Kao, Y. Y. Tseng, D. S. Yu, C. C. Chen, S. P. McAlister, C. C. Chi, “Physics and Modeling of Ge-on-Insulator MOSFETs,” European Solid State Device Research Conf, (ESSDERC) Tech. Dig. (IEEE), pp. 285-288, Grenoble – France, September 12-16, 2005. (Invited paper)

98.      A. Chin, “Integration of Ge and GeOI with III-V RF & opto-electronic technologies,” in Future Prospects of Ge Device Technology Workshop, IMEC, Leuven Belgium, June 21, 2005. (Invited paper)

99.      M. F. Li, C. Zhu, C. Shen, X. F.Yu, Y. P. Feng, Y.C.Yeo, Albert Chin  and D. L. Kwong, “Charge Trapping and Bias Temperature Instability  in High-k dielectric  CMOS Transistors” 208 Electrochemical Society Meeting, Los Angeles, USA Sept. 2005. (Invited paper)

100.  M.-F. Li, S. Lee, S. Zhu, R. Li, J. Chen, Albert Chin and D. L. Kwong, “New Developments in Schottky Source/Drain High-k/Metal Gate CMOS Transistors,” ECS 207 meeting, Quabec, Canada, May 2005. (Invited paper)

101.  C. C. Chen, C. C. Liao, H. L. Kao, Albert Chin, Sean P. McAlister and C. C. Chi, “AC Power Loss and Signal Coupling in VLSI backend Interconnects,” Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), pp. 570-571, Kobe, Japan, Sept. 15-17, 2005.

102.  C. H. Lai, C. C. Huang, K. C. Chiang, H. L. Kao, W. J. Chen, Albert Chin and C. C. Chi, “Fast High-k AlN MONOS Memory with Large Memory Window and Good Retention,” 63rd  Device Research Conference (DRC) (IEEE), pp., 2005.

103.  J. G. Mihaychuk, M. W. Denhoff, S. P. McAlister, W. Ross McKinnon, J. Lapointe, and Albert Chin, “Broad-spectrum light emission from metal-insulator-silicon tunnel diodes” Proc. SPIE Int. Soc. Opt. Eng. 5730, 29, (Optoelectronic Integration on Silicon II ) San Jose, USA, Jan. 2005.

104.  S. McAlister, A. Chin, D. S.Yu, and H. L. Kao, “Performance and Potential of Germanium on Insulator FETs,” 12th Canadian Semiconductor Conference, Ottawa, Ontario, Canada 16-19 Aug 2005.

105.  D. S. Yu, Albert Chin, C. C. Laio, C. F. Lee, C. F. Cheng, W. J. Chen, C. Zhu, M.-F. Li, S. P. McAlister, and D. L. Kwong, “3D GOI CMOSFETs with Novel IrO2(Hf) Dual Gates and High-k Dielectric on 1P6M-0.18mm-CMOS,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 181-184, San Francisco, Dec. 2004.

106.  Tony Low, M. F. Li, W. J. Fan, N. S. Tyam, Y.-C. Yeo, C. Zhu, A. Chin, L. Chan, D. L. Kwong, “Impact of Surface Roughness on Silicon & Germanium Ultra-Thin-Body MOSFETs,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 151-154, San Francisco, Dec. 2004.

107.  M. C. King, M. T. Yang, C. W. Kuo, Y. Chang, and A. Chin, “RF Noise Scaling Trend of MOSFETs from 0.5 mm to 0.13 mm Technology Nodes,” in IEEE MTT-S Intl. Microwave Symp. Dig., vol. 1, pp. 9-12, June 6-11, 2004.

108.  D. S. Yu, K. T. Chan, A. Chin, S. P. McAlister, C. Zhu, M. F. Li, and Dim-Lee Kwong, “Narrow-Band Band-pass Filters on Silicon Substrates at 30 GHz,” in IEEE MTT-S Intl. Microwave Symp. Dig., vol. 3, pp. 1467-1470, June 6-11, 2004.

109.  C. H. Lai, C. F. Lee, A. Chin, C. H. Wu, C. Zhu, M. F. Li, S. P. McAlister, and D. L. Kwong, “A Tunable and Program-Erasable Capacitor on Si with Long Tuning Memory,” in IEEE RF-IC Symp. Dig., pp. 259-262, June, 2004.

110.  M.C. King, Z. M. Lai, C. H. Huang, C. F. Lee, D. S. Yu, C. M. Huang, Y. Chang and Albert Chin, “Modeling Finger Number Dependence on RF Noise to 10 GHz in 0.13mm Node MOSFETs with 80nm Gate Length,” in IEEE RF-IC Symp. Dig., pp. 171-174, June, 2004.

111.  Albert Chin, D. S. Yu, C. C. Laio, C. F. Cheng, W. J. Chen, C. Zhu, M.-F. Li, Y. C. Yeo, W. J. Yoo, and D. L. Kwong, “New VLSI Architecture- High Mobility Metal-Gate/High-k nGOI CMOSFETs and High RF Performance Passive Devices on Si,” 3rd International Workshop on New Group IV Semiconductors, Sendai, Japan, Oct. 12-13, 2004. (Invited paper)

112.  X. Yu, C. X. Zhu, X. P. Wang, M. F. Li, Albert Chin, A. Du, W. D. Wang, D. L. Kwong, “High Mobility and Excellent Threshold Voltage Stability of NMOSFETs Using HfTaO Gate Dielectrics,” IEEE Symp. on VLSI Technology, pp. 110-111, US, June 2004.

113.  S. J. Kim, B. J. Cho, S. J. Ding, M.-F. Li, M. B. Yu, C. Zhu, A. Chin, and D.-L. Kwong, “Engineering of Voltage Nonlinearity in High-k MIM Capacitor for Analog/Mixed-Signal ICs,” IEEE Symp. on VLSI Technology, pp. 218-219, US, June 2004.

114.  Albert Chin, C. H. Lai, B. F. Hung, C. F. Cheng, S. P. McAlister, C. X. Zhu, M.-F. Li and D. L. Kwong, “A Novel Program-Erasable High-k AlN Capacitor with Memory Function,” IEEE 5th Non-Volatile Memory Technology Symp. (NVMTS) Dig., pp. 18-23, Orlando, FL, USA, Nov. 15-17, 2004. (Invited paper)

115.  A. Chin, D. S. Yu, B. F. Hung, W. J. Chen, C. X. Zhu, M.-F. Li, and D. L. Kwong, “High Electron and Hole Mobility Fully-Silicided-gate/High-k/Ge-On-Insulator C-MOSFETs with Process Comparable to Current VLSI,” 2nd Intl. SiGe Technology & Device Meeting, IEEE, Frankfurt (Oder), Germany, May 16-19, 2004. (Invited paper & Section Chairman)

116.  A. Chin, C. H. Lai, Z. M. Lai, C. F. Lee, C. Zhu, M. F. Li, B. J. Cho and D.-L. Kwong, “High Performance RF MOSFETs and Passive Devices on Si” Asia-Pacific Microwave Conf. (APMC), IEEE, Delhi, India, Dec. 15-18, 2004. (Invited paper)

117.  J. G. Mihaychuk, M. W. Denhoff, S. P. McAlister, W. R. McKinnon, P. Ma, J. Lapointe, and Albert Chin, “Light emission in silicon tunnel diodes,” Proc. SPIE Int. Soc. Opt. Eng. 5577, 423, Ottawa, CA, Sept. 2004. (Invited paper)

118.  C. C. Chen, J. T. Kuo, C. Y. Tsai and Albert Chin, “A high-performance ring resonator filter on pcb with a large bandwidth and low insertion loss,” Asia-Pacific Microwave Conf. (APMC), IEEE, Delhi, India, Dec. 15-18, 2004.

119.  P. Kalavade, J. Schulze, S. Banerjee, A. Chin, and J Kavalieros, “Ge in main-stream CMOS: a future or fancy?” 62th Device Research Conference (DRC) (IEEE), pp. 189-189, Notre Dame, Indiana, June 2004. (Rump section panelist)

120.  N. Wu, Q. Zhang, C. Zhu, D. S. H. Chan, M. F. Li, N. Balasubramanian, A. Y.Du, A. Chin, J. K. O. Sin, and D.-L. Kwong, “A Novel Surface Passivation Process for HfO2 Ge MOSFETs” 62th Device Research Conference (DRC) (IEEE), pp. 19-20, Notre Dame, IN, June 2004.

121.  D. S. Yu, A. Chin, B. F. Hung, W. J. Chen, C. X. Zhu, M.-F. Li, S. Y. Zhu and D. L. Kwong, “Low Workfunction Fully Silicided Gate on SiO2/Si and LaAlO3/GOI n-MOSFETs,” 62th Device Research Conference (DRC) (IEEE), pp. 21-22, Notre Dame, IN, June 2004.

122.  C. H. Lai, D. S. Yu, C. F. Cheng, Albert Chin, S. P. McAlister, C. X. Zhu, M.-F. Li and D. L. Kwong, “A Novel Program-Erasable Capacitor Using High-k AlN Dielectric,” 62th Device Research Conference (DRC) (IEEE), pp. 77-78, Notre Dame, IN, June 2004.

123.  M. F. Li , H. Y. Yu, Y. T. Hou , J. F. Kang , X. P. Wang, C. Shen, C. Ren, Y. C. Yeo, C. X. Zhu, D.S.H. Chan, Albert Chin, D.L.Kwong, “Selected Topics on HfO2 Gate Dielectrics for future ULSI CMOS Devices,” 7th Intl. Conf. on Solid-State & Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2004. (Invited paper)

124.  A. Chin, H. L. Kao, D. S. Yu, C. C. Liao, C. Zhu, M.-F. Li, S. Zhu and Dim-Lee Kwong, “High Performance Metal-Gate/High-k MOSFETs and GaAs Compatible RF Passive Devices on Ge-On-Insulator Technology” 7th Intl. Conf. on Solid-State and Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2004. (Invited paper)

125.  D. S. Yu, C. F. Cheng, Albert Chin, C. Zhu, M.-F. Li, and Dim-Lee Kwong, “High Performance fully silicided NiSi:Hf gate on LaAlO3/GOI n-MOSFET with Little Fermi-level Pinning,” Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), Tokyo, Japan, Sept. 15-17, 2004.

126.  Tony Low, C. Shen, M.-F. Li, Yee-Chia Yeo, Y.-T. Hou, C.X. Zhu, Albert Chin, Lap Chan, D.-L. Kwong, “Study of Mobility in Strained Silicon and Germanium Ultra
Thin Body MOSFETs,” Intl. Conference on Solid-State Devices & Materials (SSDM)
(IEEE), Tokyo, Japan, Sept. 15-17, 2004.

127.  S. Zhu, J. Chen, H. Y. Yu, S. J. Whang, J. H. Chen, C. Shen, M. F. Li, S. J. Lee ,C. Zhu, DSH Chan, A. Du, C. H. Tung , J. Singh, Albert Chin, and D.L.Kwong, “Schottky s/d MOSFETs with high-K gate dielectrics and metal gate electrodes,” 7th Intl. Conf. on Solid-State and Integrated- Circuit Technology (ICSICT), (IEEE), October 18-21, 2004.

128.  S. J. Ding, H. Hu, C. Zhu, S. J. Kim, M. F. Li, B. J. Cho, Albert Chin, and D.L.Kwong, “A. comparison study of high-density MIM capacitors with ALD HfO2-Al2O3 Laminated, sandwiched and stacked dielectrics,” 7th Intl. Conf. on Solid-State & Integrated-Circuit Technology (ICSICT), (IEEE), October 18-21, 2004.

129.  C. C. Liao, Z. M. Lai, C. F. Lee, J. T. Lin, D. S. Yu and Albert Chin, “Modeling RF Noise of Multi-Fingers 0.18 mm node MOSFETs,” Electrochemical Society (ECS) Intl Semiconductor Technology Conf., 2004.

130.  Y. Tian, S. C. Rustagi, A. Chin, M. F. Li, Y. Xiong, C X Zhu, M B Yu, “Enhancement of Q-Factor of Inductors using High energy Proton Implantation”, Symp. on Microelectronics (SOM), Singapore, 2004.

131.  A. Chin, K. T. Chan, H. C. Huang, C. Chen, V. Liang, J. K. Chen, S. C. Chien, S. W. Sun, D. S. Duh, W. J. Lin, C. Zhu, M.-F. Li, S. P. McAlister and D. L. Kwong, “RF Passive Devices on Si with Excellent Performance Close to Ideal Devices Designed by Electro-Magnetic Simulation,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 375-378, Washington DC, Dec. 2003. (Invited paper)

132.  C. H. Huang, D. S. Yu, A. Chin, W. J. Chen, C. X. Zhu, M.-F. Li, B. J. Cho, and D. L. Kwong, “Fully Silicided NiSi and Germanided NiGe Dual Gates on SiO2/Si and Al2O3/Ge-On-Insulator MOSFETs,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 319-322, Washington DC, Dec. 2003.

133.  C. Zhu, H. Hu, X. Yu, A. Chin, M. F. Li, and D. L. Kwong, “Dependences of VCC (Voltage Coefficient of Capacitance) of High-K HfO2 MIM Capacitors: An Unified Understanding and Prediction,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 379-382, Washington DC, Dec. 2003.

134.  H. Hu, S. J. Ding, H. F. Lim, C. Zhu, M.F. Li, S.J. Kim, X. F. Yu, J. H. Chen, Y. F. Yong, B. J. Cho, D.S.H. Chan, S. C. Rustagi, M. B. Yu, C. H. Tung, A. Du, D. My, P. D. Fu, A. Chin, and D. L. Kwong, “High Performance HfO2-Al2O3 Laminate MIM Capacitors by ALD for RF and Mixed Signal IC Applications,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 879-882, Washington DC, Dec. 2003.

135.  T. Low, Y. T. Hou, M. F. Li, C. Zhu, A. Chin, G. Samudra1 and D. -L. Kwong, “Investigation of Performance Limits of Germanium Double-Gated MOSFETs,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 691-694, Washington DC, Dec. 2003.

136.  A. Chin, D. S. Yu, C. H. Wu, C. H. Huang, and W. J. Chen, “High Hole Mobility of Al2O3 MOSFETs on Dislocation Free SiGe-on-Insulator Wafers,” 2nd International Symposium on High-K Gate Dielectrics, (ElectroChemical Soc. Fall Meeting) Orlando, Florida, 12-17 Oct. 2003. (Invited paper)

137.  A. Chin, D. S. Yu, C. H. Wu, C. H. Huang, and W. J. Chen, “Ge-On-Insulator: The Ideal Substrate for High-k Gate Dielectric and Metal-Gate MOSFETs Integration with Both High Electron and Hole Mobility,” International Symposium on Advanced Devices and Process Technology, (organized by "Ultimately Integrated Devices and Systems" Research Committee by the Japan Society for the Promotion of Science), Tokyo, Japan, Nov. 5, 2003. (Invited paper)

138.  A. Chin, P. Mei, C. Zhu, M.-F. Li, Sungjoo Lee, W. J. Yoo, B. J. Cho and Dim-Lee Kwong, “New Substrate Platform for Metal-Gate/High-k Gate Dielectric MOSFET Integration and RF Technology up to 100 GHz,” Intl. Symp. on Substrate Engineering/Nano SOI Technology for Advanced Semiconductor Devices, Seoul, Korea, Nov. 13-15, 2003. (Invited paper)

139.  C. H. Huang, M. Y. Yang, A. Chin, W. J. Chen, C. X. Zhu, B. J. Cho, M.-F. Li, and D. L. Kwong, “Very Low Defects and High Performance Ge-On-Insulator p-MOSFETs with Al2O3 Gate Dielectrics,” IEEE Symp. on VLSI Technology, pp. 119-120, Japan, June 2003.

140.  S. J. Kim, B. J. Cho, M.-F. Li, C. Zhu, A. Chin, and D. L. Kwong, “HfO2 and Lanthanide-doped HfO2 MIM Capacitors for RF/Mixed IC Applications,” IEEE Symp. on VLSI Technology, pp. 77-78, Japan, June 2003.

141.  T. Low, Y. T. Hou, M.-F. Li, C. X. Zhu, D. L. Kwong and A. Chin, “Germanium MOS: an evaluation from carrier quantization and tunneling current” IEEE Symp. on VLSI Technology, pp. 117-118, Japan, June 2003.

142.  K. T. Chan, S. S. Chuang, C. H. Wu, C. D. Kuo, and A. Chin, “Electrically Stimulated Cell Membrane Breakdown in Human Placenta TL and Lung Cancer Cell A549 in 3D Trap Arrays on Si Substrate,” 61th Device Research Conference (DRC) (IEEE), pp. 103-104, Salt Lake City, Utah, June 2003.

143.  D. S. Yu, C. H. Huang, A. Chin, and W. J. Chen,Low Defects and High Quality Al2O3 Ge-on-Insulator MOSFETs,” 61th Device Research Conference (DRC) (IEEE), pp. 39-40, Salt Lake City, Utah, June 2003.

144.  K. T. Chan, A. Chin, M. F. Li, D. L. Kwong, S. P. McAlister, D. S. Duh, and W. J. Lin,RF Passive Devices on Si Substrates with close to ideal EM performance,” 61th Device Research Conference (DRC) (IEEE), pp. 95-96, Salt Lake City, Utah, June 2003.

145.  C. Y. Lin, L. H. Lai, A. Chin, Y. T. Hou, M. F. Li, and S. P. McAlister, “Light emission from Al2O3/Si1-xGex/Si MOS tunnel diodes,” 61th Device Research Conference (DRC) (IEEE), pp. 51-52, Salt Lake City, Utah, June 2003.

146.  K. T. Chan, A. Chin, J. T. Kuo, C. Y. Chang, D. S. Duh, W. J. Lin, C. X. Zhu, M. F. Li, and D. L. Kwong, “Microwave Coplanar Filters on Si Substrates,” in IEEE MTT-S Intl. Microwave Symp. Dig., vol. 3, pp. 1909-1912, June 8-13, 2003.

147.  K. T. Chan, A. Chin, S. P. McAlister, C. Y. Chang, V. Liang, J. K. Chen, S. C. Chien, D. S. Duh, and W. J. Lin, “Low RF loss and noise of transmission lines on Si substrates using an improved ion implantation process,” in IEEE MTT-S Intl. Microwave Symp. Dig., vol. 2, pp. 963-966, June 8-13, 2003.

148.  C. H. Huang, M.Y. Yang, A. Chin, C. X. Zhu, M. F. Li, and D. L. Kwong, “High Density RF MIM Capacitors Using High-k AlTaOx Dielectrics,” IEEE MTT-S Intl. Microwave Symp. Dig., vol. 1, pp. 507-510, June 8-13, 2003.

149.  C. H. Huang, K. T. Chan, C. Y. Chen, A. Chin, G. W. Huang, C. Tseng, V. Liang, J. K. Chen, and S. C. Chien, “The minimum noise figure and mechanism as scaling RF MOSFETs from 0.18 to 0.13 mm technology nodes,” in IEEE RF-IC Symp., pp. 373-376, June 8-10, 2003.

150.  J. G. Mihaychuk, M. W. Denhoff, S.P. McAlister, W.R. McKinnon, S. Raymond, X. Wu, J. W. Fraser, H. T. Tran, P. Ma, J.-M. Baribeau, and A. Chin, “Enhanced Electroluminescence from Metal-Insulator-Silicon Tunnel Diodes,” 11th Canadian Semiconductor Technology Conf., Ottawa, Canada, Aug. 18-22, 2003.

151.  Q. Zhang, N. Wu, C. Zhu, M.F. Li, and DSH Chan, A. Chin, D.L. Kwong, L.K. Bera, N. Balasubramanian, A.Y. Du, C.H. Tung, H. Liu and J. K.O. Sin, “Germanium pNOSFETs with HfON gate dielectric,”  Intl.. Semiconductor Device Research Symp. (IEEE), Washington DC, Dec. 10-12, 2003.

152.  N. Wu, Q. Zhang, C. Zhu, M.F. Li, and DSH Chan, A. Chin, D.L. Kwong, L.K. Bera, N. Balasubramanian, A.Y. Du, C.H. Tung, H. Liu and J. K. O. Sin, “Ge pMOSFETs with MOCVD HfO2 gate dielectric,” Intl.. Semiconductor Device Research Symp. (IEEE), pp. 252-253, Washington DC, Dec. 10-12, 2003.

153.  X. Yu, C. Zhu, Q. Zhang, N. Wu, H. Hu, M.F. Li, DSH Chan, A. Chin, W.D. Wang, and D. L. Kwong, “Improved Crystalization Temperature and Interfacial Properties of HfO2 Gate Dielectrics by adding Ta2O5 with TaN Metal Gate,” Intl.. Semiconductor Device Research Symp. (IEEE), Washington DC, Dec. 10-12, 2003.

154.  S. Zhu, H.Y. Yu, S.J. Wang, J.H. Chen, C. Shen, C. Zhu, S.J. Lee, M.F. Li, DSH Chan, W.J. Yoo, A. Y. Du, C.H. Tung, and J. Singh, A. Chin, and D.L. Kwong, “Low Temperature MOSFET Technology with Schottky barrier source/ drain, high-K gate dielectrics and metal gate electrode,” Intl.. Semiconductor Device Research Symp. (IEEE), Washington DC, Dec. 10-12, 2003.

155.  H. Hu, S. J. Ding, C. Zhu, YF Lu, M.F. Li, B. J. Cho, and DSH Chan, S. C. Rustagi, MB Yu, A. Chin, and Dim-Lee Kwong, “Investigation of PVD HfO2 MIM capacitors for Si RF and mixed signal ICs application,” Intl.. Semiconductor Device Research Symp. (IEEE), Washington DC, Dec. 10-12, 2003.

156.  Q. C. Zhang, N. Wu, C. Zhu, M. F. Li, DSH Chan, A. Chin, D. L. Kwong, L.K.Bera, N. Balasubmmanian, A.Y. Du, C.H. Tung, H. T. Liu, and J. K. O. Sin, Germanium pMOSFET with HfON gate dielectric,” Intl.. Semiconductor Device Research Symp. (IEEE), pp. 256-257, Washington DC, Dec. 10-12, 2003.

157.  X. Yu, C. Zhu, H. Hu, A. Chin, M. F. Li, B. J. Cho, D. L. Kwong, P. D. Foo, and M. B. Yu, “MIM Capacitors with HfO2 and HfAlOx for Si RF and Analog Applications,” Material Research Society (MRS) 2003 Spring Meeting, E5.9, San Francisco, USA, April 21-25, 2003.

158.  Q. C. Zhang, C. Zu, N. Wu, A. Chin, M. F. Li, B. J. Cho, L. K. Bera, and D. L. Kwong, "Germanium MOS capacitors with ultra thin HfO2 gate dielectric", International Conference on Materials for Advanced Technologies, Singapore, 2003.

159.  S. J. Kim, H. F. Lim, H. Hu, X. F. Yu, H. Y. Yu, B. J. Cho, M. F. Li, C. X. Zhu, A. Chin, and D. L. Kwong, "Properties of PVD Hafnium oxide films in metal-insulator-metal structure and the role of HfN barrier at dielectric/metal interface", International Conference on Materials for Advanced Technologies, Singapore, 2003.

160.  C. H. Huang, H. Y. Li, A. Chin, V. Liang, and S. C. Chien, “Optimized Noise and Consistent RF Model for 0.18mm MOSFETs,” International Symp. on VLSI Technology, System, and Applications, (IEEE), pp. 109-112, 2003.

161.  C. H. Huang, C.Y. Lin, H. Y. Li, W. J. Chen, A. Chin, and P. Mei , “La2O3/Si0.3Ge0.7 p-MOSFETs and Ni Germano-Silicide,” International Symp. on VLSI Technology, System, and Applications, (IEEE), pp. 52-55, 2003.

162.  C. Y. Lin, H. Y.  Lee, A. Chin, Y. T. Hou, M. F. Li, S. P. McAlister, D. L. Kwong “1.3 mm light emission from Al2O3/Si1-xGex/Si MOS tunnel diodes,” 5th Pacific Rim Conference on Lasers and Electro-Optics, (IEEE), vol. 1,  pp. 269-269, 2003.

163.  C. Y. Lin, H. Y.  Lee, A. Chin, Y. T. Hou, M. F. Li, S. P. McAlister, D. L. Kwong “Light emission in (La, Al)2O3/Si MOS tunnel diodes” 5th Pacific Rim Conference on Lasers and Electro-Optics, (IEEE), vol. 2,  pp. 616-616, 2003.

164.  S. B. Chen, C. H. Lai, A. Chin, J. C. Hsieh, and J. Liu, “RF MIM Capacitors Using High-K Al2O3 and AlTiOx Dielectrics,” IEEE MTT-S Intl. Microwave Symp. Dig., vol. 1, pp. 201-204, June 2002.

165.  K. T. Chan, C. Y. Chen, A. Chin, J. C. Hsieh, and J. Liu, T. S. Duh, and W. J. Lin, “High Performance 40-GHz Bandpass Filters on Si Using Proton Implantation,” 60th Device Research Conference (DRC) (IEEE), pp. 69-70, Santa Barbara, CA, June 2002.

166.  C. H. Huang, C. H. Lai, J. C. Hsieh, and J. Liu, and A. Chin, “RF noise in deep sub-mm MOSFETs and proposed solution,” 60th Device Research Conference (DRC) (IEEE), pp. 71-72, Santa Barbara, CA, June 2002.

167.  C. Y. Lin, C. H. Lai, W. J. Chen,* and A. Chin, “Formation of high quality silicide on SiGe with high Ge contents,” 44th Electronic Materials Conference (EMC), Santa Barbara, CA, June 2002.

168.  K. T. Chan, A. Chin, Y. B. Chen, Y.-D. Lin, D. T. S. Duh, and W. J. Lin, “Integrated Antennas on Si, Proton-Implanted Si and Si-on-Quartz,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 903-906, Washington DC, Dec. 2001.

169.  M. Y. Yang, S. B. Chen, A. Chin, C. L. Sun, B. C. Lan, and S. Y. Chen, “One-Transistor PZT/Al2O3, SBT/Al2O3 and BLT/Al2O3 Stacked Gate Memory,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 795-798, Washington DC, Dec. 2001.

170.  A. Chin, C. S. Liang, C. Y. Lin, C. C. Wu, and J. Liu, “Strong and Efficient Light Emission in ITO/Al2O3 Superlattice Tunnel Diode,” IEEE International Electron Devices Meeting (IEDM) Tech. Dig., pp. 171-174, Washington DC, Dec. 2001.

171.  A. Chin, S. B. Chen, K. T. Chan, J. C. Hsieh, M. H. Chang, C. C. Lin, and J. Liu, “RF Performance Limitation of High-k AlTiOx and Al2O3 Gate Dielectrics,” International Workshop on Gate Insulator, pp. 62-63, Tokyo, Japan, Nov., 2001. (Invited paper)

172.  K. T. Chan, A. Chin, C. M. Kwei, D. T. Shien, and W. J. Lin “Transmission Line Noise from Standard and Proton-Implanted Si,” IEEE MTT-S Intl. Microwave Symp. Dig., vol. 2, pp. 763-766, June 2001.

173.  A. Chin, M. Y. Yang, S. B. Chen, C. L. Sun, and S. Y. Chen “Fast Write Time and Long Retention 1T Memory,” 59th Device Research Conference (DRC) (IEEE), pp. 18-19, Notre Dame, IN, June 2001.

174.  A. Chin, “Gate oxide integrity of SiGe p-MOSFET with high current drive,” International Semiconductor Technology Conference, Japan, 2001. (Invited paper)

175.  Y. H. Lin, Y. C. Chen, F. M. Pan, I. J. Hsieh, and A. Chin, “The thickness dependent gate oxide integrity degradation by Cu contamination,” 43th Electronic Materials Conference (EMC), Notre Dame, IN, June 2000.

176.  A. Chin, “Super MOSFET using high K gate dielectric and SiGe,” 59th Symp. on Semiconductors & IC Technology, Tokyo Japan, Dec. 2000. (Invited paper)

177.  Y. H. Wu, A. Chin, K. H. Shih, C. C. Wu, S. C. Pai, C. C. Chi, and C. P. Liao, “RF loss and crosstalk on extremely high resistivity (10K-1MW-cm) Si fabricated by ion implantation,” IEEE MTT-S International Microwave Symp.Dig., vol. 1, pp. 221-224, June 2000.

178.  Y. H. Wu, A. Chin, C. S. Liang, and C. C. Wu, “The performance limiting factors as RF MOSFETs scale down,” IEEE RF-IC Symp., pp. 151-155, June 2000.

179.  A. Chin, Y. H. Wu, S. B. Chen, C. C. Liao, and W. J. Chen, “High Quality La2O3 and Al2O3 Gate Dielectrics with Equivalent Oxide Thickness 5-10Å,” IEEE Symp. on VLSI Technology, pp. 16-17, US, June 2000. (Highlight Section Paper)

180.  A. Chin “The possible materials and requirement of high-K gate dielectrics for VLSI,” MRS High-K Gate Dielectrics workshop, US, June 2000. (Invited paper)

181.  Y. H. Wu, K. T. Chan, S. B. Chen, W. J. Chen, and A. Chin, “Improved shallow junction integrity using single crystalline CoSi2,” 42th Electronic Materials Conference (EMC), Boulder, CO, June 2000.

182.  S. B. Chen, C. H. Huang, Y. H. Wu, W. J. Chen, and A. Chin, “High quality thermal ultra-thin gate oxide directly grown on high temperature formed Si0.3Ge0.7,” 42th Electronic Materials Conference (EMC), Boulder, CO, June 2000.

183.  Y. H. Wu, M. Y. Yang, S. B. Chen, W. J. Chen, A. Chin, and C. M. Kwei, “High frequency characterization of mega-ohm resistivity Si formed by high-energy ion implantation,” 42th Electronic Materials Conference (EMC), Boulder, CO, June 2000.

184.  A. Chin, C. C. Liao, C. H. Lu, W. J. Chen, and C. Tsai, “Device and Reliability of High-K Al2O3 Gate Dielectric with Good Mobility and Low Dit,” IEEE Symp. on VLSI Technology, p.135-136, Japan, June 1999.

185.  Y. H. Wu, W. J. Chen, A. Chin and C. Tsai, “Electrical and structure characterization of single crystalline SiGe formed by Ge deposition and RTP,” 41th Electronic Materials Conference (EMC), Santa Barbara, CA, June 1999.

186.  C. C. Liao, W. J. Chen, C. H. Lu, A. Chin and C. Tsai, “Electrical properties of Al2O3 gate dielectric,” 41th Electronic Materials Conference (EMC), Santa Barbara, CA, June 1999.

187.  B. C. Lin, Y. C. Cheng, A. Chin, T. Wang, and C. Tsai, “The Deuterium Effect on SILC,” 30th Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), Hiroshima, Japan, Sept. 1998.

188.  I. J. Hsieh, C. C. Liao, C. Tsai, and A. Chin, “From Strain-Compensated In0.80Ga0.20As /InAlAs to InAs/InAlAs HEMT’s,” 30th Intl. Conference on Solid-State Devices & Materials (SSDM) (IEEE), Hiroshima, Japan, Sept. 1998.

189.  A. Chin, “Mobility and oxide breakdown behavior in ultra-thin oxide with atomically smooth interface,” 5th International Conf. On Solid State and IC Technology (ICSICT), (IEEE), China, Oct. 1998. (Invited paper)

190.  C. C. Liao, A. Chin, and C. Tsai, “Electrical Characterization of Al2O3 on Si from MBE-grown AlAs and Al ,” 10th International Conference on Molecular Beam Epitaxy (MBE) Dig., pp. 652-655, Cannes, France, August 1998.

191.  A. Chin, B. C. Lin, W. J. Chen, Y. B. Lin, and C. Tsai, “The Effect of thin gate oxide with HF vapor pretreatment and in-situ native oxide desorption”40th Electronic Materials Conference (EMC), Charlottesville, Virginia, June 1998.

192.  A. Chin, D. Prinslow, V. Tsai, G. Nasserbakht, and B. Eklund, “Possibility of MMIC on Si: The Lossy Substrate Issue,” International Symp. on VLSI Technology, System, and Applications, (IEEE), June 1997.

193.  A. Chin, R. H. Kao, W. J. Chen, B. C. Lin, T. Chang, C. Tsai, and J. C.-M. Huang, “Ultra-thin oxide with atomically smooth interfaces,” International Symp. on VLSI Technology, System, and Applications, (IEEE), June 1997.

194.  A. Chin, K. Lee, W. J. Chen, Y. S. Zhang, S. Horng, and J. H. Kao, “Picosecond photoresponse of carriers on Si,” 38th Electronic Materials Conference (EMC) Santa Barbara, CA, June 1996.

195.  A. Chin, K. Lee, Y.-C. Huang, Y.-S. Lin, and W. Hsu, “Novel processing technique for thin Si diaphragms,” Micro System Technologies 96, Germany, Sept. 1996.

196.  A. Chin, Y. S. Kao, K. Y. Hsieh, W. J. Chen, and J. H. Kao,  “Growth induced low-dimensional quantized microstructure and optical property enhancement in (111)A AlGaAs,” 38th Electronic Materials Conference (EMC) Santa Barbara, CA, June 1996.

197.  A. Chin, K. Lee, J. Chu, and S. S. Li,  “AlGaAs/GaAs, AlGaAs/InGaAs multiple quantum wells and Si-doped p-type quantum well infrared photodetectors grown on (311)A GaAs,” 9th International Conference on Molecular Beam Epitaxy, CA., August 1996.

198.  A. Chin, B. C. Lin, G. L. Gu, K. Y. Hsieh, M. J. Jou, and B. J. Lee, “Novel approach to enhance the optical property in AlGaAs and InGaAlP by natural ordering during growth,” 22nd Intl. Symposium on Compound Semiconductors, Korea, Aug. 1995.

199.  J. Chu, S. S. Li, A. Chin, S. R. Yen, and K. M. Chang, "Investigation of Si-doped p-type GaAs/AlGaAs and strained-layer InGaAs/AlGaAs quantum well infrared photodetectors grown on (311) GaAs for Mid-and Long-Wavelength IR Detection," 3rd Intl. Symp. on Long Wavelength Infrared Detectors and Arrays- Electrochemical Soc., Chicago, IL 1995.

200.  C. Bru-Chevallier, G. Archinard, P. Berger, Y. Baltagi, T. Benyattou, G. Guillot, and A. Chin, " Piezoelectric constant determination from photoreflectance measurements in strained InGaAs/AlGaAs layers grown on polar substrates," Materials Research Society Meeting (MRS), Boston, Nov 1995.

201.  A. Chin, K. Y. Hsieh and H. Y. Lin, "Natural Ordering and Quantum Confinement in (111)A and (111)B AlGaAs," International Conference on Low Dimensional Structures and Devices, Pan Pacific Singapore, May 1995.

202.  A. Chin, K. Y. Hsieh and H. Y. Lin, "Late news paper: Spontaneous formation of Al rich and Ga rich AlxGa1-xAs/AlyGa1-yAs superlattice and strong enhancement of optical and electrical properties," 8th International Conference on Molecular Beam Epitaxy, Osaka, Japan, August 1994.

203.  A. Chin, K. Hsieh, and U. Das, “Observation of Enhanced Optical Properties and Spontaneous Ordering in (111) AlGaAs,” 36th Electronic Materials Conference (EMC) Boulder, CO., June 1994.

204.  Z. Osman, U. Das, and A. Chin, "Nonlinearities in Strained (111) InGaAs/AlGaAs MQWs," 36th Electronic Materials Conference (EMC), Boulder, CO., June 1994.

205.  H. Y .Lin, S. C. Peng, F. C. Wei, L. D. Deng, and A. Chin, “Enhanced optical and electrical properties in (III)B AlGaAs,” IEDMS, Sept. 1994.

206.  H. H. Wang, J. F. Whitaker, A. Chin, J. Mazurowski, and J. Ballingall, "Subpicosecond Cryogenic Electrical Response of Unannealed Low Temperature Grown GaAs,"13th Conference on Lasers and Electro-Optics (CLEO), Technical Digest Vol. 11, Optical Society of America, Baltimore, MD., May 1993.

207.  A. Chin, L. Yang, P. Martin, K. Nordheden, J. Ballingall, T. Yu, and P. C. Chao, "High Performance HBT Grown by MBE Using Novel Growth Method", North American Molecular Beam Epitaxy Conference, Ottwa, Canada, October 1992.

208.  A. Chin, S. Hersee, P. Martin, J. Mazurowski, J. Ballingall, J. A. Glass, and J. T. Spencer, "CBE Growth of InP with Triethylindium and Metalorganic Phosphorus Precursors", Materials Research Society Meeting (MRS), Boston, MA., December 1992.

209.  A. Chin, P. Martin, U. Das, J. Mazurowski, and J. Ballingall, "CBE Growth of InP Using Triethylindium and Bisphosphinoethane", North American Molecular Beam Epitaxy Conference, Ottwa, Canada, October 1992.

210.  W. Zhou, D. D. Smith, H. Shen, J. Pamulapati, M. Dutta, A. Chin, and J. M. Ballingall, "Magneto-reflectance Studies of (111) Grown GaAs/AlGaAs Quantum Wells," American Physical Society Meeting, Indianapolis, IN, March 1992.

211.  A. Chin, P. Martin, J. Ballingall, T. Yu, and J. Mazurowski, " High Quality Materials and Heterostructures on (111)B GaAs", 11th Molecular Beam Epitaxy workshop, Austin, Texas, September 1991.

212.  A. Chin, P. Martin, J. Ballingall, T. Yu, and J. Mazurowski, "MBE Grown High Quality (111) AlGaAs/GaAs and GaAs/InGaAs/GaAs Heterostructures", 33rd Electronic Materials Conference (EMC), Boulder, CO., June 1991.

213.  J. H. Zhao, T. Burke, D. Larson, M. Weiner, A. Chin, J. M. Ballingall, and T. H. Yu, "A High Performance Optically Gated Heterostructure Thyristor Passivated With LT-GaAs,” Materials Research Society Meeting (MRS), Boston, MA., December 1991.

214.  S. D. Hersee, L. Yang, M. Kao, P. Martin, J. Mazurowski, A. Chin, and J. M. Ballingall, "MOMBE GaAs and AlGaAs for Microelectronic Devices,"3rd International Conference on Chemical Beam Epitaxy and Related Growth Techniques, Oxford, UK, September, 1991.

215.  A. Chin, T. Y. Chang, A. Ourmazd, and E. M. Monberg, "Partial Ordering and Enhanced Mobility in Ga0.47In0.53As MODFET Grown on (110) InP by Molecular Beam Epitaxy,"32nd Electronic Materials Conference (EMC), Santa Barbara, CA, June 1990.

216.  A. Chin, T. Y. Chang, A. Ourmazd, E. M. Monberg, A. M. Chang, and C. Kurdak, “Effects of Substrate Orientation and Pseudomorphic Growth on Alloy Scattering in Modulation Doped GaInAs,” 6th International Conference on Molecular Beam Epitaxy, La Jolla, CA, August 1990.

217.  A. Chin, and T. Y. Chang, "Achievement of Exceptionally High Mobilities in Modulation Doped Ga1-xInxAs on InP Using a strain Composited Structure," 10th Molecular Beam Epitaxy workshop, Raleigh, NC, September 1989.

218.  A. Chin, and T. Y. Chang, "Multilayer Reflectors by MBE for Resonance Enhanced Absorption in Thin High Speed Detectors," 10th Molecular Beam Epitaxy workshop, Raleigh, NC, September 1989.

219.  A. Chin, P. K. Bhattacharya, K. H. Chang, and D. Biswas, "Optical and Structural Properties of Molecular Beam Epitaxial GaAs on Sapphire," 9th Molecular Beam Epitaxy workshop, West Lafayette, September 1988.

220.  M. Marso, A. Chin, P. K. Bhattacharya and H. Beneking, "GaInAs Camel Diodes Grown by MBE," 18th European Solid State Device Research Conference (ESSDERC), (IEEE), Montpellier, France, September 1988.

221.  A. Chin, and P. K. Bhattacharya, "A High-Gain Superlattice Bipolar Transistor with Controlled Carrier Multiplication,"14th International Symposium on GaAs and related Compounds, Crete, Greece, Sept. 1987 (eds. A. Christou and H. S. Rupprecht), The Institute of Physics, Bristol, 821(1988).

222.  A. Chin, and P. K. Bhattacharya, "A Controlled-Avalanche Superlattice Transistor," IEEE /Cornell 11th Biennial Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Ithaca, NY., August, 1987.

223.  A. Chin, P. K. Bhattacharya, W. P. Hong, and W. Li," Molecular Beam Epitaxial Growth of High Quality In0.52Al0.48As and In1-x-yGaxAlyAs," 8th Molecular Beam Epitaxy workshop, Los Angeles, September 1987.

224.  W. P. Hong, A. Chin, N. Debbar, J Hinckley, P. K. Bhattacharya, J. Singh and R. C. Clarke, "Material properties and clustering in Molecular Beam Epitaxial In0.52Al0.48As and In1-x-yGaxAlyAs,"  7th Molecular Beam Epitaxy workshop, Boston, MA., October 1986.

225.  W. P. Hong, S. Dhar, P. R. Berger, A. Chin, and P. K. Bhattacharya, "Deep Levels in Molecular Beam Epitaxial InxAl1-xAs/InP," 29th Electronic Materials Conference (EMC), Amherst, MA., June 1986.

226.  F-Y. Juang, W. Li, P. K. Bhattacharya, U. Das and A. Chin, "III-V Superlattice Photodiodes," 13th International Symp. on GaAs and related Compounds, Las Vegas, Utah, September 1986, (Institute of Physics, London, 1987, ed. W. T. Lindley), Inst. Phys. Conf. Series 83, 411(1987).

227.  Y. Nashimoto, S. Dhar, W. P. Hong, A. Chin, P. Berger, and P. K. Bhattacharya, "Investigation of Molecular Beam Epitaxial In0.53Ga0.47As Regrown on Liquid Phase Epitaxial In0.53Ga0.47As/InP," 6th Molecular Beam Epitaxy workshop, Minneapolis, MN., August 1985.


  

Others:

1.          Albert Chin, “Green Electronic Device,” Intl. Electron Devices & Materials Symp. (IEDMS), Nov. 29-30, 2012. (Keynote speaker)

2.          Y. C. Chiu, C. Y. Tsai, Z. W. Zheng, Ming Liu, and Albert Chin, “Retention and Endurance Improvements in Flash Memory Using Atomic Level Controllability,” Intl. Electron Devices & Materials Symp. (IEDMS), Nov. 29-30, 2012.

3.          Y. C. Chiu, C. Y. Tsai, S. H. Lin, V.A. Gritsenko, and Albert Chin, “Low Voltage Green Flash Memory Device Using High-κ Dielectric and Quantum Trap Technology,” Nov. 8-9, 2012.

4.          Albert Chin, “Low-Power High-Performance Electronic Devices for SoC,” Green Technology Symp., Dallas, TX, Aug. 29 2009.

5.          Albert Chin, “The Defect-Free Ge-on-Insulator Transistor with Advanced High-K Dielectric and Metal-Gate Technology,” Asia Nano Forum NEWSLETTER, no. 5, pp. 15-16, Feb. 2009.

6.          Albert Chin, C. H. Cheng, S. H. Lin, N. C. Su, S. J. Wang, C. P. Chou, and F. S. Yeh, “High-k Dielectric Metal-Electrode Innovation for Nano CMOS & Memory Devices,” National Science Council – Japan Science & Technology Agency (NSC-JST) Nano Device Workshop, July 30-31, 2008. (Invited paper)

7.          Albert Chin, “High-k Dielectric Innovation to Logic and Memory Devices by a Local/International Team Effort,” TSMC-SRC GRC Workshop, TSMC Headquarter, Jan. 29, 2007. (Invited paper)

8.          Albert Chin, “Application High-k dielectric for Logic CMOS, Non-volatile memory and DRAM,” Seminar at Graduate institute Electronics Engineering, Dept. of Electrical Eng., National Taiwan University, April 16, 2007.

9.          Albert Chin, “Application High-k dielectric for Logic CMOS, Non-volatile memory and DRAM”, Seminar at Institute of Electronics Engineering, Dept. of Electrical Eng., National Tsung Hua University, Nov. 2, 2007.

10.      Albert Chin, C. H. Wu, S. J. Wang, Y. H. Wu, S. H. Lin, and F. S. Yeh, “New Generation High-k CMOS Using MBE,” MBE_Taiwan, May 2007. (Invited paper)

11.      Albert Chin, C. H. Lai, K. C. Chiang, C. H. Wu, S. J. Wang, and H. L. Hwang, “Advanced Memory and Logic Devices Using High-k Nano-Technology,” in Symposium on Nano Device Technology (SNDT), April 2006. (Invited paper)

12.      Albert Chin, C. C. Chen, C. C. Laio, D. S. Yu, K. C. Chiang, W. J. Chen, M.-F. Li, W. J. Yoo, C. Zhu, and G. Samudra, “3D Integrated Metal-Gate/High-k CMOS for Both DC and AC Power Consumption Solutions,” Symposium on Nano Device Technology (SNDT), May 3~5, 2005. (Invited paper)

13.      林一平荊鳳德曾煜棋,“電機資工領域如何投稿學術期刊,”科技大樓, 台北市和平東路二段106, Feb. 27, 2008.

14.      吳建宏、洪彬舫、王水進、林哲緯、謝焸家、黃惠良、荊鳳德, “45奈米以下的高介電係數閘極與金屬閘極CMOS元件,” 奈米通訊, 14卷第一期, pp. 25-30, April 2007. (Invited paper)

 

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